Exploració per tema "Hardware implementation"

Ara es mostren els items 1-2 de 2

    • Performance evaluation and scaling of a multiprocessor architecture emulating complex SNN algorithms 

      Sánchez Rivera, Giovanny; Madrenas Boadas, Jordi; Moreno Aróstegui, Juan Manuel (Springer Verlag, 2010-09)
      Article
      Accés restringit per política de l'editorial
      The performance analysis of an efficient multiprocessor architecture that allows accelerating the emulation of large-scale Spiking Neural Networks (SNNs) is reported. After describing the architecture and the complex SNN ...

    • Picos: A hardware runtime architecture support for OmpSs 

      Yazdanpanah Ahmadabadi, Fahimeh; Álvarez Martínez, Carlos; Jiménez González, Daniel; Badia Sala, Rosa Maria; Valero Cortés, Mateo (Elsevier, 2015-12)
      Article
      Accés obert
      OmpSs is a programming model that provides a simple and powerful way of annotating sequential programs to exploit heterogeneity and task parallelism based on runtime data dependency analysis, dataflow scheduling and ...