Exploració per tema "Circuits integrats a molt gran escala -- Disseny i construcció"

Ara es mostren els items 1-3 de 3

    • ASIC implementation of an all-digital self-adaptive PVTA variation-aware clock generation system 

      Pérez-Puigdemont, Jordi; Moll Echeto, Francisco de Borja (Association for Computing Machinery (ACM), 2016)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      An all-digital self-adaptive clock generation system capable of autonomously adapt the clock frequency to compensate the effects of static spatially heterogeneous (SSHet) PVTA variations is presented. The design uses ...

    • Design and implementation of an adaptive proactive reconfiguration technique in SRAM caches 

      Pouyan, Peyman; Amat Bertran, Esteve; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio (2013)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      Scaling of device dimensions toward nano-scale regime has made it essential to innovate novel design techniques for improving the circuit robustness. This work proposes an implementation of adaptive proactive reconfiguration ...

    • Error probability in synchronous digital circuits due to power supply noise 

      Martorell Cid, Ferran; Pons Solé, Marc; Rubio Sola, Jose Antonio; Moll Echeto, Francisco de Borja (2007-09)
      Text en actes de congrés
      Accés obert
      This paper presents a probabilistic approach to model the problem of power supply voltage fluctuations. Error probability calculations are shown for some 90-nm technology digital circuits. The analysis here considered ...