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Llistant per Autor Etsion, Yoav

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Vista preliminarDataTítolAutor(s)
Jimenez.pdf.jpg2013Analysis of the Task Superscalar architecture hardware designYazdanpanah Ahmadabadi, Fahimeh; Jiménez González, Daniel; Álvarez Martínez, Carlos; Etsion, Yoav; Badia Sala, Rosa Maria
05642060.pdf.jpg2010Interleaving granularity on high bandwidth memory architecture for CMPsCabarcas, Felipe; Rico Carro, Alejandro; Etsion, Yoav; Ramírez Bellido, Alejandro
Introducing Speculative Optimizations in Task Dataflow with Language Extensions and Runtime Support.pdf.jpg2012Introducing speculative optimizations in task dataflow with language extensions and runtime supportAzuelos, Nathaniel; Etsion, Yoav; Keidar, Idit; Zaks, A.; Ayguadé Parra, Eduard
23-gen-2012On the simulation of large-scale architectures using multiple application abstraction levelsRico Carro, Alejandro; Cabarcas, Felipe; Villavieja Prados, Carlos; Pavlovic, Milan; Vega, Augusto; Etsion, Yoav; Ramírez Bellido, Alejandro; Valero Cortés, Mateo
05695528.pdf.jpg2010Task superscalar: an out-of-order task pipelineEtsion, Yoav; Cabarcas, Felipe; Rico Carro, Alejandro; Ramírez Bellido, Alejandro; Badia Sala, Rosa Maria; Ayguadé Parra, Eduard; Labarta Mancho, Jesús José; Valero Cortés, Mateo
2011Trace-driven simulation of multithreaded applicationsRico Carro, Alejandro; Duran González, Alejandro; Cabarcas, Felipe; Etsion, Yoav; Ramírez Bellido, Alejandro; Valero Cortés, Mateo
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