E-prints UPC >

Llistant per Autor Cabarcas, Felipe

Vista preliminar	Data	Títol	Autor(s)
	2010	Comparing last-level cache designs for CMP architectures	Vega, Augusto; Rico Carro, Alejandro; Cabarcas, Felipe; Ramírez Bellido, Alejandro; Valero Cortés, Mateo
	2010	Interleaving granularity on high bandwidth memory architecture for CMPs	Cabarcas, Felipe; Rico Carro, Alejandro; Etsion, Yoav; Ramírez Bellido, Alejandro
	2010	Long DNA sequence comparison on multicore architectures	Sánchez Castaño, Friman; Cabarcas, Felipe; Ramírez Bellido, Alejandro; Valero Cortés, Mateo
	23-gen-2012	On the simulation of large-scale architectures using multiple application abstraction levels	Rico Carro, Alejandro; Cabarcas, Felipe; Villavieja Prados, Carlos; Pavlovic, Milan; Vega, Augusto; Etsion, Yoav; Ramírez Bellido, Alejandro; Valero Cortés, Mateo
	2010	Task superscalar: an out-of-order task pipeline	Etsion, Yoav; Cabarcas, Felipe; Rico Carro, Alejandro; Ramírez Bellido, Alejandro; Badia Sala, Rosa Maria; Ayguadé Parra, Eduard; Labarta Mancho, Jesús José; Valero Cortés, Mateo
	oct-2010	The SARC architecture	Gaydadjiev, Georgi; Isaza, Sebastian; Ramírez Bellido, Alejandro; Cabarcas, Felipe; Juurlink, Ben; Álvarez Mesa, Mauricio; Sánchez Castaño, Friman; Azevedo, Arnaldo; Meenderinck, Cor; Ciobanu, Catalin
	2011	Trace-driven simulation of multithreaded applications	Rico Carro, Alejandro; Duran González, Alejandro; Cabarcas, Felipe; Etsion, Yoav; Ramírez Bellido, Alejandro; Valero Cortés, Mateo