• OpenPiton optimizations towards high performance manycores 

      Leyva Santes, Neiel Israel; Monemi, Alireza; Oliete Escuín, Noelia; López Paradís, Guillem; Abancens Calvo, Xabier; Balkind, Jonathan; Vallejo Gutiérrez, Enrique; Moretó Planas, Miquel; Álvarez Martí, Lluc (Association for Computing Machinery (ACM), 2023)
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      In recent years, numerous multicore RISC-V platforms have emerged. Within the RISC-V ecosystem, Networks-on-Chip (NoCs) such as OpenPiton are employed in designs that aim to scale to a large number of cores. This paper ...
    • Peripheral twists for torus topologies with arbitrary aspect ratio 

      Vallejo Gutiérrez, Enrique; Moretó Planas, Miquel; Martínez, Carmen; Beivide Palacio, Julio Ramón (2011)
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      A torus is a common topology used in supercomputer networks. Asymmetric Tori suffer from resource usage imbalance, which translates to reduced performance. Twisted Tori employ a twist in the peripheral links of one or more ...
    • PIugSMART: a pluggable open-source module to implement multihop bypass in networks-on-chip 

      Monemi, Alireza; Pérez Gallardo, Iván; Leyva Santes, Neiel; Vallejo Gutiérrez, Enrique; Beivide Palacio, Julio Ramon; Moretó Planas, Miquel (Association for Computing Machinery (ACM), 2021)
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      The integration of many processing elements per die makes it more difficult to provide low latency in the Network-on-Chip (NoC). Multihop bypass proposals, such as SMART, attack this problem by allowing flits to skip ...
    • SynFull-RTL: evaluation methodology for RTL NoC designs 

      Leyva Santes, Neiel Israel; Monemi, Alireza; Vallejo Gutiérrez, Enrique (Institute of Electrical and Electronics Engineers (IEEE), 2022-12)
      Article
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      SynFull is a widely employed tool that generates realistic traffic patterns for the performance evaluation of a NoC. In this work, we identify the main limitations of SynFull: high variability and long simulation time and ...