Exploració per autor "Nemirovsky, Mario"

Ara es mostren els items 23-31 de 31

    • SABES: Statistical Available Bandwidth EStimation from passive TCP measurements 

      Ciaccia, Francesco; Romero Ruiz, Ivan; Arcas Abella, Oriol; Montero Banegas, Diego Teodoro; Serral Gracià, René; Nemirovsky, Mario (Institute of Electrical and Electronics Engineers (IEEE), 2020)
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      Estimating available network resources is fundamental when adapting the sending rate both at the application and transport layer. Traditional approaches either rely on active probing techniques or iteratively adapting the ...

    • Scalability of Broadcast Performance in Wireless Network-on-Chip 

      Abadal Cavallé, Sergi; Mestres Sugrañes, Albert; Nemirovsky, Mario; Lee, Heekwan; Gonzalez, Antonio; Alarcón Cot, Eduardo José; Cabellos Aparicio, Alberto (IEEE, 2016-12-01)
      Article
      Accés obert
      Networks-on-Chip (NoCs) are currently the paradigm of choice to interconnect the cores of a chip multiprocessor. However, conventional NoCs may not suffice to fulfill the on-chip communication requirements of processors ...

    • Scalability of broadcast performance in wireless network-on-chip 

      Abadal Cavallé, Sergi; Mestres Sugrañes, Albert; Nemirovsky, Mario; Lee, Heekwan; González Colás, Antonio María; Alarcón Cot, Eduardo José; Cabellos Aparicio, Alberto (2016-12-01)
      Article
      Accés obert
      Networks-on-Chip (NoCs) are currently the paradigm of choice to interconnect the cores of a chip multiprocessor. However, conventional NoCs may not suffice to fulfill the on-chip communication requirements of processors ...

    • Tackling IoT ultra large scale systems: Fog computing in support of hierarchical emergent behaviors 

      Roca, Damian; Milito, Rodolfo; Nemirovsky, Mario; Valero Cortés, Mateo (Springer, 2018)
      Capítol de llibre
      Accés obert
      The Internet of Things (IoT) marks a phase transition in the evolution of the Internet, distinguished by a massive connectivity and the interaction with the physical world. The organic evolution of IoT requires the ...

    • Thread assignment in multicore/multithreaded processors: A statistical approach 

      Radojković, Petar; Carpenter, Paul Matthew; Moretó Planas, Miquel; Cakarevic, Vladimir; Verdú Mulà, Javier; Pajuelo González, Manuel Alejandro; Cazorla Almeida, Francisco Javier; Nemirovsky, Mario; Valero Cortés, Mateo (2016-01-01)
      Article
      Accés obert
      The introduction of multicore/multithreaded processors, comprised of a large number of hardware contexts (virtual CPUs) that share resources at multiple levels, has made process scheduling, in particular assignment of ...

    • Thread assignment of multithreaded network applications in multicore/multithreaded processors 

      Radojković, Petar; Cakarevic, Vladimir; Verdú Mulà, Javier; Pajuelo González, Manuel Alejandro; Cazorla Almeida, Francisco Javier; Nemirovsky, Mario; Valero Cortés, Mateo (2013-12)
      Article
      Accés obert
      The introduction of multithreaded processors comprised of a large number of cores with many shared resources makes thread scheduling, and in particular optimal assignment of running threads to processor hardware contexts ...

    • Thread to strand binding of parallel network applications in massive multi-threaded systems 

      Radojković, Petar; Cakarevic, Vladimir; Verdú Mulà, Javier; Pajuelo González, Manuel Alejandro; Cazorla Almeida, Francisco Javier; Nemirovsky, Mario; Valero Cortés, Mateo (2010-05)
      Article
      Accés restringit per política de l'editorial
      In processors with several levels of hardware resource sharing, like CMPs in which each core is an SMT, the scheduling process becomes more complex than in processors with a single level of resource sharing, such as pure-SMT ...

    • Thread to strand binding of parallel network applications in massive multi-threaded systems 

      Radojković, Petar; Cakarevic, Vladimir; Verdú Mulà, Javier; Pajuelo González, Manuel Alejandro; Cazorla Almeida, Francisco Javier; Nemirovsky, Mario; Valero Cortés, Mateo (ACM Press. Association for Computing Machinery, 2010-01)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      In processors with several levels of hardware resource sharing, like CMPs in which each core is an SMT, the scheduling process becomes more complex than in processors with a single level of resource sharing, such as pure-SMT ...

    • Understanding the overhead of the spin-lock loop in CMT architectures 

      Cakarevic, Vladimir; Radojković, Petar; Verdú Mulà, Javier; Cazorla Almeida, Francisco Javier; Gioiosa, Roberto; Pajuelo González, Manuel Alejandro; Nemirovsky, Mario; Valero Cortés, Mateo (2008)
      Text en actes de congrés
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      Spin locks are a synchronization mechanisms used to provide mutual exclusion to shared software resources. Spin locks are used over other synchronization mechanisms in several situations, like when the average waiting ...