Exploració per autor "Etsion, Yoav"

Ara es mostren els items 9-10 de 10

    • Task superscalar: an out-of-order task pipeline 

      Etsion, Yoav; Cabarcas, Felipe; Rico Carro, Alejandro; Ramírez Bellido, Alejandro; Badia Sala, Rosa Maria; Ayguadé Parra, Eduard; Labarta Mancho, Jesús José; Valero Cortés, Mateo (IEEE Computer Society Publications, 2010)
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      We present Task Superscalar, an abstraction of instruction-level out-of-order pipeline that operates at the tasklevel. Like ILP pipelines, which uncover parallelism in a sequential instruction stream, task superscalar ...

    • Trace-driven simulation of multithreaded applications 

      Rico Carro, Alejandro; Duran González, Alejandro; Cabarcas, Felipe; Etsion, Yoav; Ramírez Bellido, Alejandro; Valero Cortés, Mateo (2011)
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      Accés restringit per política de l'editorial
      Over the past few years, computer architecture research has moved towards execution-driven simulation, due to the inability of traces to capture timing-dependent thread execution interleaving. However, trace-driven simulation ...