Exploració per autor "Etsion, Yoav"

Ara es mostren els items 8-10 de 10

    • On the simulation of large-scale architectures using multiple application abstraction levels 

      Rico Carro, Alejandro; Cabarcas, Felipe; Villavieja Prados, Carlos; Pavlovic, Milan; Vega, Augusto; Etsion, Yoav; Ramírez Bellido, Alejandro; Valero Cortés, Mateo (2012-01-23)
      Article
      Accés restringit per política de l'editorial
      Simulation is a key tool for computer architecture research. In particular, cycle-accurate simulators are extremely important for microarchitecture exploration and detailed design decisions, but they are slow and, so, not ...

    • Task superscalar: an out-of-order task pipeline 

      Etsion, Yoav; Cabarcas, Felipe; Rico Carro, Alejandro; Ramírez Bellido, Alejandro; Badia Sala, Rosa Maria; Ayguadé Parra, Eduard; Labarta Mancho, Jesús José; Valero Cortés, Mateo (IEEE Computer Society Publications, 2010)
      Text en actes de congrés
      Accés obert
      We present Task Superscalar, an abstraction of instruction-level out-of-order pipeline that operates at the tasklevel. Like ILP pipelines, which uncover parallelism in a sequential instruction stream, task superscalar ...

    • Trace-driven simulation of multithreaded applications 

      Rico Carro, Alejandro; Duran González, Alejandro; Cabarcas, Felipe; Etsion, Yoav; Ramírez Bellido, Alejandro; Valero Cortés, Mateo (2011)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      Over the past few years, computer architecture research has moved towards execution-driven simulation, due to the inability of traces to capture timing-dependent thread execution interleaving. However, trace-driven simulation ...