Exploració per autor "Duato, José"
Ara es mostren els items 2-5 de 5
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Combining RAM technologies for hard-error recovery in L1 data caches working at very-low power modes
(2013)
Text en actes de congrés
Accés restringit per política de l'editorialLow-power modes in modern microprocessors rely on low frequencies and low voltages to reduce the energy budget. Nevertheless, manufacturing induced parameter variations can make SRAM cells unreliable producing hard errors ... -
Efficient interconnects for clustered microarchitectures
(Institute of Electrical and Electronics Engineers (IEEE), 2002)
Text en actes de congrés
Accés obertClustering is an effective microarchitectural technique for reducing the impact of wire delays, the complexity, and the power requirements of microprocessors. In this work, we investigate the design of on-chip interconnection ... -
Enabling CUDA acceleration within virtual machines using rCUDA
(IEEE, 2012-02-16)
Comunicació de congrés
Accés obertThe hardware and software advances of Graphics Processing Units (GPUs) have favored the development of GPGPU (General-Purpose Computation on GPUs) and its adoption in many scientific, engineering, and industrial areas. ... -
On-chip interconnects and instruction steering schemes for clustered microarchitectures
(2005-02)
Article
Accés obertClustering is an effective microarchitectural technique for reducing the impact of wire delays, the complexity, and the power requirements of microprocessors. In this work, we investigate the design of on-chip interconnection ...
