• Physical planning for the architectural exploration of large-scale chip multiprocessors 

      San Pedro Martín, Javier de; Nikitin, Nikita; Cortadella, Jordi; Petit Silvestre, Jordi (2013)
      Comunicació de congrés
      Accés restringit per política de l'editorial
      This paper presents an integrated flow for architectural exploration and physical planning of large-scale hierarchical tiled CMPs. Classical floorplanning and wire planning techniques have been adapted to incorporate layout ...
    • Physical-aware link allocation and route assignment for chip multiprocessing 

      Nikitin, Nikita; Chatterjee, Satrajit; Cortadella, Jordi; Kishinevsky, Michael; Ogras, Umit (Institute of Electrical and Electronics Engineers (IEEE), 2010)
      Text en actes de congrés
      Accés obert
      The architecture definition, design, and validation of the interconnect networks is a key step in the design of modern on-chip systems. This paper proposes a mathematical formulation of the problem of simultaneously defining ...
    • Physical-aware system-level design for tiled hierarchical chip multiprocessors 

      Cortadella, Jordi; San Pedro Martín, Javier de; Nikitin, Nikita; Petit Silvestre, Jordi (ACM Press. Association for Computing Machinery, 2013)
      Text en actes de congrés
      Accés obert
      Tiled hierarchical architectures for Chip Multiprocessors (CMPs) represent a rapid way of building scalable and power-e fficient many-core computing systems. At the early stages of the design of a CMP, physical parameters ...
    • Static task mapping for tiled chip multiprocessors with multiple voltage islands 

      Nikitin, Nikita; Cortadella, Jordi (2011)
      Report de recerca
      Accés obert
      The complexity of large Chip Multiprocessors (CMP) makes design reuse a practical approach to reduce the manufacturing and design cost of high-performance systems. This paper proposes techniques for static task mapping ...
    • Static task mapping for tiled chip multiprocessors with multiple voltage islands 

      Nikitin, Nikita; Cortadella, Jordi (Springer Verlag, 2012)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      The complexity of large Chip Multiprocessors (CMP) makes design reuse a practical approach to reduce the manufacturing and design cost of high-performance systems. This paper proposes techniques for static task mapping ...