Ara es mostren els items 69-88 de 129

    • On the benefits of tasking with OpenMP 

      Rico, Alejandro; Sánchez Barrera, Isaac; Joao, Jose A.; Randall, Joshua; Casas, Marc; Moretó Planas, Miquel (Springer, 2019)
      Text en actes de congrés
      Accés obert
      Tasking promises a model to program parallel applications that provides intuitive semantics. In the case of tasks with dependences, it also promises better load balancing by removing global synchronizations (barriers), and ...
    • On the convergence of mainstream and mission-critical markets 

      Girbal, Sylvain; Moretó Planas, Miquel; Grasset, Arnaud; Abella Ferrer, Jaume; Quiñones, Eduardo; Cazorla Almeida, Francisco Javier; Yehia, Sami (Institute of Electrical and Electronics Engineers (IEEE), 2013)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      The computing market has been dominated during the last two decades by the well-known convergence of the highperformance computing market and the mobile market. In this paper we witness a new type of convergence between ...
    • On the maturity of parallel applications for asymmetric multi-core processors 

      Chronaki, Kallia; Moretó Planas, Miquel; Casas, Marc; Rico, Alejandro; Badia Sala, Rosa Maria; Ayguadé Parra, Eduard; Valero Cortés, Mateo (Elsevier, 2019-05-01)
      Article
      Accés obert
      Asymmetric multi-cores (AMCs) are a successful architectural solution for both mobile devices and supercomputers. By maintaining two types of cores (fast and slow) AMCs are able to provide high performance under the facility ...
    • On the use of many-core Marvell ThunderX2 processor for HPC workloads 

      Soria Pardos, Víctor; Armejach Sanosa, Adrià; Suárez Gracía, Dario; Moretó Planas, Miquel (2021)
      Article
      Accés obert
      Marvell’s ThunderX2 has been the first Arm-based processor with deployments in large-scale HPC production systems, challenging the dominance that x86 processors had in the last decades. While x86 processors and its software ...
    • Online prediction of applications cache utility 

      Moretó Planas, Miquel; Cazorla, Francisco; Ramírez Bellido, Alejandro; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2007)
      Text en actes de congrés
      Accés obert
      General purpose architectures are designed to offer average high performance regardless of the particular application that is being run. Performance and power inefficiencies appear as a consequence for some programs. ...
    • OpenCL-based FPGA accelerator for semi-global approximate string matching using diagonal bit-vectors 

      Castells Rufas, David; Marco-Sola, Santiago; Aguado Puig, Quim; Espinosa Morales, Antonio; Moure López, Juan Carlos; Alvarez Martí, Lluc; Moretó Planas, Miquel (Institute of Electrical and Electronics Engineers (IEEE), 2021)
      Text en actes de congrés
      Accés obert
      An FPGA accelerator for the computation of the semi-global Levenshtein distance between a pattern and a reference text is presented. The accelerator provides an important benefit to reduce the execution time of read-mappers ...
    • OpenPiton optimizations towards high performance manycores 

      Leyva Santes, Neiel Israel; Monemi, Alireza; Oliete Escuín, Noelia; López Paradís, Guillem; Abancens Calvo, Xabier; Balkind, Jonathan; Vallejo Gutiérrez, Enrique; Moretó Planas, Miquel; Álvarez Martí, Lluc (Association for Computing Machinery (ACM), 2023)
      Text en actes de congrés
      Accés obert
      In recent years, numerous multicore RISC-V platforms have emerged. Within the RISC-V ecosystem, Networks-on-Chip (NoCs) such as OpenPiton are employed in designs that aim to scale to a large number of cores. This paper ...
    • Optimizing computation-communication overlap in asynchronous task-based programs 

      Castillo, Emilio; Jain, Nikhil; Casas, Marc; Moretó Planas, Miquel; Schulz, Martin; Beivide Palacio, Julio Ramon; Valero Cortés, Mateo; Bhatele, Abhinav (Association for Computing Machinery (ACM), 2019)
      Text en actes de congrés
      Accés obert
      Asynchronous task-based programming models are gaining popularity to address the programmability and performance challenges in high performance computing. One of the main attractions of these models and runtimes is their ...
    • PARSECSs: Evaluating the impact of task parallelism in the PARSEC benchmark suite 

      Chasapis, Dimitrios; Casas, Marc; Moretó Planas, Miquel; Vidal Ortiz, Raul; Ayguadé Parra, Eduard; Labarta Mancho, Jesús José; Valero Cortés, Mateo (2015-12-01)
      Article
      Accés obert
      In this work, we show how parallel applications can be implemented efficiently using task parallelism. We also evaluate the benefits of such parallel paradigm with respect to other approaches. We use the PARSEC benchmark ...
    • Per-task energy accounting in computing systems 

      Liu, Qixiao; Jiménez, Víctor; Moretó Planas, Miquel; Abella Ferrer, Jaume; Cazorla, Francisco; Valero Cortés, Mateo (2013)
      Report de recerca
      Accés obert
      We present for the first time the concept of per-task energy accounting (PTEA) and relate it to per-task energy metering (PTEM). We show the benefits of supporting both in future computing systems. Using the shared last-level ...
    • Per-task energy metering and accounting in the multicore era 

      Liu, Qixiao; Moretó Planas, Miquel; Abell, Jaume; Cazorla Almeida, Francisco Javier; Valero Cortés, Mateo (Barcelona Supercomputing Center, 2015-05-05)
      Text en actes de congrés
      Accés obert
      Energy has become arguably the most expensive resource in a computing system. As multi-core processors are the preferred processing platform across different computing domains, measuring the energy usage draws vast attention. ...
    • Performance and energy effects on task-based parallelized applications: User-directed versus manual vectorization 

      Caminal Pallarés, Helena; Caballero de Gea, Diego; Cebrián González, Juan Manuel; Ferrer, Roger; Casas, Marc; Moretó Planas, Miquel; Martorell Bofill, Xavier; Valero Cortés, Mateo (2018-06)
      Article
      Accés obert
      Heterogeneity, parallelization and vectorization are key techniques to improve the performance and energy efficiency of modern computing systems. However, programming and maintaining code for these architectures poses a ...
    • Peripheral twists for torus topologies with arbitrary aspect ratio 

      Vallejo Gutiérrez, Enrique; Moretó Planas, Miquel; Martínez, Carmen; Beivide Palacio, Julio Ramón (2011)
      Text en actes de congrés
      Accés obert
      A torus is a common topology used in supercomputer networks. Asymmetric Tori suffer from resource usage imbalance, which translates to reduced performance. Twisted Tori employ a twist in the peripheral links of one or more ...
    • PIugSMART: a pluggable open-source module to implement multihop bypass in networks-on-chip 

      Monemi, Alireza; Pérez Gallardo, Iván; Leyva Santes, Neiel; Vallejo Gutiérrez, Enrique; Beivide Palacio, Julio Ramon; Moretó Planas, Miquel (Association for Computing Machinery (ACM), 2021)
      Text en actes de congrés
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      The integration of many processing elements per die makes it more difficult to provide low latency in the Network-on-Chip (NoC). Multihop bypass proposals, such as SMART, attack this problem by allowing flits to skip ...
    • PLANAR: a programmable accelerator for near-memory data rearrangement 

      Barredo Ferreira, Adrián; Armejach Sanosa, Adrià; Beard, Jonathan C.; Moretó Planas, Miquel (Association for Computing Machinery (ACM), 2021)
      Text en actes de congrés
      Accés obert
      Many applications employ irregular and sparse memory accesses that cannot take advantage of existing cache hierarchies in high performance processors. To solve this problem, Data Layout Transformation (DLT) techniques ...
    • Porting and optimizing BWA-MEM2 using the Fujitsu A64FX processor 

      Langarita Benítez, Rubén; Armejach Sanosa, Adrià; Ibáñez Marín, Pablo; Alastruey Benedé, Jesús; Moretó Planas, Miquel (2023-09)
      Article
      Accés obert
      Sequence alignment pipelines for human genomes are an emerging workload that will dominate in the precision medicine field. BWA-MEM2 is a tool widely used in the scientific community to perform read mapping studies. In ...
    • POSTER: Exploiting asymmetric multi-core processors with flexible system sofware 

      Chronaki, Kallia; Moretó Planas, Miquel; Casas, Marc; Rico, Alejandro; Badia Sala, Rosa Maria; Ayguadé Parra, Eduard; Labarta Mancho, Jesús José; Valero Cortés, Mateo (Association for Computing Machinery (ACM), 2016)
      Comunicació de congrés
      Accés obert
      Energy efficiency has become the main challenge for high performance computing (HPC). The use of mobile asymmetric multi-core architectures to build future multi-core systems is an approach towards energy savings while ...
    • POSTER: SPiDRE: accelerating sparse memory access patterns 

      Barredo Ferreira, Adrián; Beard, Jonathan C.; Moretó Planas, Miquel (Institute of Electrical and Electronics Engineers (IEEE), 2019)
      Comunicació de congrés
      Accés obert
      Development in process technology has led to an exponential increase in processor speed and memory capacity. However, memory latencies have not improved as dramatically and represent a well-known problem in computer ...
    • Power efficient job scheduling by predicting the impact of processor manufacturing variability 

      Chasapis, Dimitrios; Moretó Planas, Miquel; Schulz, Martin; Rountree, Barry; Valero Cortés, Mateo; Casas, Marc (Association for Computing Machinery (ACM), 2019)
      Text en actes de congrés
      Accés obert
      Modern CPUs suffer from performance and power consumption variability due to the manufacturing process. As a result, systems that do not consider such variability caused by manufacturing issues lead to performance degradations ...
    • PrioRAT: criticality-driven prioritization inside the on-chip memory hierarchy 

      Dimic, Vladimir; Moretó Planas, Miquel; Casas, Marc; Valero Cortés, Mateo (Springer Nature, 2021)
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      The ever-increasing gap between the processor and main memory speeds requires careful utilization of the limited memory link. This is additionally emphasized for the case of memory-bound applications. Prioritization of ...