Ara es mostren els items 9-28 de 33

    • Enhanced serial RRAM cell for unpredictable bit generation 

      Rodríguez Montañés, Rosa; Arumi Delgado, Daniel; Gómez-Pau, Álvaro; Manich Bou, Salvador; Bargalló González, Mireia; Campabadal, Francesca (2021-05)
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      In this letter, the serial configuration of two RRAMs is used as a basic cell to generate an unpredictable bit. The basis of the operation considers starting from the Low Resistive State (LRS) in both devices (initialization ...
    • ETS 2022 ORGANIZING COMMITTEE 

      Manich Bou, Salvador; Rodríguez Montañés, Rosa; Bernardi, Paolo; Tille, Daniel; Mir, Salvador; Bosio, Alberto; Arumi Delgado, Daniel; Gómez Pau, Álvaro; Cassano, Luca; Jiao, Hailong; Miclea, Liviu; Sanchez, Ernesto; Savino, Alessandro; Canal Corretger, Ramon; Eggersglüß, Stephan; Fransi, Sergi; Taouil, Mottaqiallah; Calomarde Palomino, Antonio; Weiner, Michael; Michael, Maria K.; Sonza Reorda, Matteo; Larsson, Erik; Vatajelu, Elena-Ioana; Stratigopoulos, Haralampos-G.; Parisi Baradad, Vicenç; Jiao, Hailong; Huang, Junlin; Li, Huawei; Chillarige, Sameer; Kameyama, Shuichi; Carro, Luigi; Su, Fei; Nicolici, Nicola; Huang, Shi-Yu (2022-05)
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    • Gate leakage impact on full open defects in interconnect lines 

      Arumi Delgado, Daniel; Rodríguez Montañés, Rosa; Figueras Pàmies, Joan; Eichenberger, Stefan; Hora, Camelia; Kruseman, Bram (2011-06)
      Article
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      An Interconnect full open defect breaks the connection between the driver and the gate terminals of downstream transistors, generating a floating line. The behavior of floating lines is known to depend on several factors, ...
    • Impact of gate tunnelling leakage on CMOS circuits with full open defects 

      Rodríguez Montañés, Rosa; Arumi Delgado, Daniel; Figueras Pàmies, Joan; Eichenberger, S.; Hora, Camelia; Kruseman, B. (Institution of Electrical Engineers, 2007-10)
      Article
      Accés obert
      Interconnecting lines with full open defects become floating lines. In nanometric CMOS technologies, gate tunnelling leakage currents impact the behaviour of these lines, which cannot be considered electrically isolated ...
    • Impact of laser attacks on the switching behavior of RRAM devices 

      Arumi Delgado, Daniel; Manich Bou, Salvador; Gómez Pau, Álvaro; Rodríguez Montañés, Rosa; Montilla, Víctor; Hernández, David; Bargalló González, Mireia; Campabadal, Francesca (2020-01-20)
      Article
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      The ubiquitous use of critical and private data in electronic format requires reliable and secure embedded systems for IoT devices. In this context, RRAMs (Resistive Random Access Memories) arises as a promising alternative ...
    • Localization and electrical characterization of interconnect open defects 

      Rodríguez Montañés, Rosa; Arumi Delgado, Daniel; Figueras Pàmies, Joan; Beverloo, Willem; Vries, Dirk K. de; Eichenberger, Stefan; Volf, Paul A. J. (2010-02)
      Article
      Accés obert
      A technique for extracting the electrical and topological parameters of open defects in process monitor lines is presented. The procedure is based on frequency-domain measurements performed at both end points of the ...
    • Low Cost AES Protection Against DPA Using Rolling Codes 

      Albiol Perarnau, Pau; Manich Bou, Salvador; Arumi Delgado, Daniel; Rodríguez Montañés, Rosa; Gómez-Pau, Álvaro (Curran Associates, Inc., 2021)
      Text en actes de congrés
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      Many block cipher algorithms like AES are known to be weak against differential power analysis attacks (DPA) if the executing unit presents certain levels of information leakage, which is a common problem in microprocessors. ...
    • On the fitting and improvement of RRAM stanford-based model parameters using TiN/Ti/HfO2/W experimental data 

      Mahboubi, Vahab; Arumi Delgado, Daniel; Gómez Pau, Álvaro; Rodríguez Montañés, Rosa; Manich Bou, Salvador (Institute of Electrical and Electronics Engineers (IEEE), 2022)
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      The use of Resistive Random Access Memory (RRAM) devices is becoming pervasive in many applications. In particular, security based primitives can exploit their variability and non-volatility for generating cells for ...
    • Post-Bond test of through-silicon vias with open defects 

      Rodríguez Montañés, Rosa; Arumi Delgado, Daniel; Figueras Pàmies, Joan (2014)
      Text en actes de congrés
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      Through Silicon Vias (TSVs) are critical elements in three dimensional integrated circuits (3-D ICs) and are susceptible to undergo defects at different stages: during their own fabrication, the bonding stage or during ...
    • Postbond test of through-silicon vias with resistive open defects 

      Rodríguez Montañés, Rosa; Arumi Delgado, Daniel; Figueras Pàmies, Joan (2019-07-17)
      Article
      Accés obert
      Through-silicon vias (TSVs) technology has attracted industry interest as a way to achieve high bandwidth, and short interconnect delays in nanometer three-dimensional integrated circuits (3-D ICs). However, TSVs are ...
    • Prebond testing of weak defects in TSVs 

      Arumi Delgado, Daniel; Rodríguez Montañés, Rosa; Figueras Pàmies, Joan (2015-08-07)
      Article
      Accés restringit per política de l'editorial
      Through-silicon vias (TSVs) are critical elements in 3-D integrated circuits susceptible to defects during fabrication and lifetime. It is desirable to detect defective TSVs in the early steps of the fabrication process ...
    • Programming techniques of resistive random-access memory devices for neuromorphic computing 

      Machado Panadés, Pau; Manich Bou, Salvador; Gómez Pau, Álvaro; Rodríguez Montañés, Rosa; Bargalló González, Mireia; Campabadal, Francesca; Arumi Delgado, Daniel (2023-11-27)
      Article
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      Neuromorphic computing offers a promising solution to overcome the von Neumann bottleneck, where the separation between the memory and the processor poses increasing limitations of latency and power consumption. For this ...
    • Random masking interleaved scrambling technique as a countermeasure for DPA/DEMA attacks in cache memories 

      Neagu, Mădălin; Rodríguez Montañés, Rosa; Arumi Delgado, Daniel; Manich Bou, Salvador (2016-11-15)
      Text en actes de congrés
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      Memory remanence in SRAMs and DRAMs is usually exploited through cold-boot attacks and the targets are the main memory and the L2 cache memory. Hence, a sudden power shutdown may give an attacker the opportunity to ...
    • Resistive open defect characteritzation in 3D 6T SRAM memories 

      Castillo, Raúl; Arumi Delgado, Daniel; Rodríguez Montañés, Rosa (2014)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      The relentless decrease in feature size and the increase of density requirements in Integrated Circuit (IC) manufacturing arise new challenges that must be overcome. One of the most promising alternatives is three-dimensional ...
    • RRAM based cell for hardware security applications 

      Arumi Delgado, Daniel; Manich Bou, Salvador; Rodríguez Montañés, Rosa (2016)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      Resistive random access memories (RRAMs)have arisen as a competitive candidate for non-volatile memories due to their scalability, simple structure, fast switching speed and compatibility with conventional back-end processes. ...
    • RRAM Based Random Bit Generation for Hardware Security Applications 

      Arumi Delgado, Daniel; Rodríguez Montañés, Rosa; Manich Bou, Salvador; Pehl, Michael (Institute of Electrical and Electronics Engineers (IEEE), 2016)
      Text en actes de congrés
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      Resistive random access memories (RRAMs) have arisen as a competitive candidate for non-volatile memories due to their scalability, simple structure, fast switching speed and compatibility with conventional back-end ...
    • RRAM random number generator based on train of pulses 

      Yang, Binbin; Arumi Delgado, Daniel; Manich Bou, Salvador; Gómez Pau, Álvaro; Rodríguez Montañés, Rosa; Bargalló González, Mireia; Campabadal, Francesca; Fang, Liang (2021-07-30)
      Article
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      In this paper, the modulation of the conductance levels of resistive random access memory (RRAM) devices is used for the generation of random numbers by applying a train of RESET pulses. The influence of the pulse amplitude ...
    • RRAM serial configuration for the generation of random bits 

      Arumi Delgado, Daniel; Gonzalez, Mireia B.; Campabadal, Francesca (2017-06-25)
      Article
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    • Serial RRAM cell for secure bit concealing 

      Yang, Binbin; Arumi Delgado, Daniel; Manich Bou, Salvador; Gómez Pau, Álvaro; Rodríguez Montañés, Rosa; Bargalló González, Mireia; Campabadal, Francesca; Fang, Liang (2021-07-31)
      Article
      Accés obert
      Non-volatile memory cells are exposed to adversary attacks since any active countermeasure is useless when the device is powered off. In this context, this work proposes the association of two serial RRAM devices as a basic ...
    • Simulation of serial RRAM cell based on a Verilog-A compact model 

      Yang, Binbin; Arumi Delgado, Daniel; Manich Bou, Salvador; Gómez Pau, Álvaro; Rodríguez Montañés, Rosa; Bautista Roldan, Juan; Bargalló González, Mireia; Campabadal, Francesca; Fang, Liang (Institute of Electrical and Electronics Engineers (IEEE), 2021)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      Model-based simulation is one of the effective methods of scientific research. The inherent variability of resistive switching mechanisms has been an obstacle for the massive commercial implementation of the resistive ...