Exploració per autor "Cristal Kestelman, Adrián"
Ara es mostren els items 110-129 de 129
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TauRieL: targeting Traveling Salesman Problem with deep reinforcement learning
Malazgirt, Gorker Alp; Unsal, Osman Sabri; Cristal Kestelman, Adrián (Barcelona Supercomputing Center, 2019-05-07)
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The MS-processor's register file timing and power evaluation
Gonzalez Martin, Isidro; Cristal Kestelman, Adrián; Veindenbaum, Alex; Ramírez, Marco Antonio; Valero Cortés, Mateo (2008-09)
Report de recerca
Accés obertPower evaluation is an important issue in new proposal chip level architectures due to the big amount of power is dissipated as head and chips have limited head dissipation capacity. The evaluation shown in this technical ... -
The velox transactional memory stack
Cristal Kestelman, Adrián; Felber, Pascal; Riviere, Etienne; Moreira, Walter Maldonado; Harmanci, Derin; Marlier, Patrick; Diestelhorst, Stephan; Hohmuth, Michael; Pohlack, Martin; Afek, Yehuda; Tomić, Saša; Drepper, Ulrich; Gramoli, Vincent; Kapalka, Michal; Guerraoui, Rachid; Dragojevic, Aleksandar; Stenstrom, Per; Unsal, Osman Sabri; Hur, Ibrahim; Korland, Guy; Nowack, Martin; Riegel, Torvald; Shavit, Nir; Fetzer, Christof (2010-09)
Article
Accés obertThe transactional memory programming paradigm could become the coordination methodology of choice for actual and future multicore and many-core architectures. The transactional memory support spans a complete software and ... -
TM-dietlibc: A TM-aware real-world system library
Smiljkovic, Vesna; Nowack, Martin; Miletic, Nebojša; Harris, Tim; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2013)
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Accés restringit per política de l'editorialThe simplicity of concurrent programming with Transactional Memory (TM) and its recent implementation in mainstream processors greatly motivates researchers and industry to investigate this field and propose new implementations ... -
Towards fair, scalable, locking
Vallejo, Enrique; Sanyal, Sutirtha; Harris, Tim; Vallejo, Fernando; Beivide Palacio, Ramon; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Valero Cortés, Mateo (2008)
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Accés obertWithout care, Hardware Transactional Memory presents several performance pathologies that can degrade its performance. Among them, writers of commonly read variables can suffer from starvation. Though different solutions ... -
Towards zero-waste recovery and zero-overhead checkpointing in ensemble data assimilation
Keller, Kai Rasmus; Cristal Kestelman, Adrián; Bautista Gomez, Leonardo (Institute of Electrical and Electronics Engineers (IEEE), 2021)
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Accés obertEnsemble data assimilation is a powerful tool for increasing the accuracy of climatological states. It is based on combining observations with the results from numerical model simulations. The method comprises two steps, ... -
Transaction processing core for accelerating software transactional memory
Zyulkyarov, Ferad Hasanov; Milovanovic, Milos; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Ayguadé Parra, Eduard; Valero Cortés, Mateo; Harris, Tim (2007-08)
Report de recerca
Accés obertThis paper introduces an advanced hardware based approach for accelerating Software Transactional Memory (STM). The proposed solution focuses on speeding up conflict detection that grows polynomially with the number of ... -
Transactional memory and OpenMp
Milovanovic, Milos; Ferrer, Roger; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Martorell Bofill, Xavier; Ayguadé Parra, Eduard; Labarta Mancho, Jesús José; Valero Cortés, Mateo (2007-06)
Article
Accés restringit per política de l'editorialFuture generations of Chip Multiprocessors (CMP) will provide dozens or even hundreds of cores inside the chip. Writing applications that benefit from the massive computational power offered by these chips is not going to ... -
Transactional memory: an overview
Harris, T; Cristal Kestelman, Adrián; Unsal, Osman Sabri; Ayguadé Parra, Eduard; Gagliardi, F; Smith, B; Valero Cortés, Mateo (2007-05)
Article
Accés restringit per política de l'editorialWriting applications that benefit from the massive computational power of future multicore chip multiprocessors will not be an easy task for mainstream programmers accustomed to sequential algorithms rather than parallel ... -
Understanding power consumption and reliability of high-bandwidth memory with voltage underscaling
Nabavilarimi, Seyed Saber; Salami, Behzad; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Sarbazi-Azad, Hamid; Mutlu, Onur (Institute of Electrical and Electronics Engineers (IEEE), 2021)
Text en actes de congrés
Accés obertModern computing devices employ High-Bandwidth Memory (HBM) to meet their memory bandwidth requirements. An HBM-enabled device consists of multiple DRAM layers stacked on top of one another next to a compute chip (e.g, ... -
VALib and SimpleVector: Tools for rapid initial research on vector architectures
Stanic, Milan; Palomar Pérez, Óscar; Ratkovic, Ivan; Duric, Milovan; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Valero Cortés, Mateo (Association for Computing Machinery (ACM), 2014)
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Accés restringit per política de l'editorialVector architectures have been traditionally applied to the supercomputing domain with many successful incarnations. The energy efficiency and high performance of vector processors, as well as their applicability in other ... -
Vector extensions for decision support DBMS acceleration
Hayes, Timothy; Palomar Pérez, Óscar; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Valero Cortés, Mateo (IEEE, 2012)
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Accés restringit per política de l'editorialDatabase management systems (DBMS) have become an essential tool for industry and research and are often a significant component of data centres. As a result of this criticality, efficient execution of DBMS engines has ... -
Vector processing-aware advanced clock-gating techniques for low-power fused multiply-add
Ratkovic, Ivan; Palomar Pérez, Óscar; Stanic, Milan; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Valero Cortés, Mateo (2018-04-04)
Article
Accés obertThe need for power efficiency is driving a rethink of design decisions in processor architectures. While vector processors succeeded in the high-performance market in the past, they need a retailoring for the mobile market ... -
VIA: a smart scratchpad for vector units with application to sparse matrix computations
Pavón Rivera, Julián; Unsal, Osman Sabri; Cristal Kestelman, Adrián (Barcelona Supercomputing Center, 2021-05)
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Accés obertSparsematrix operations are critical kernels inmultiple application domains such as High Performance Computing, artificial intelligence and big data. Vector processing is widely used to improve performance on mathematical ... -
VIA: A smart scratchpad for vector units with application to sparse matrix computations
Pavón Rivera, Julián; Vargas Valdivieso, Iván; Barredo Ferreira, Adrián; Marimon Illana, Joan; Moretó Planas, Miquel; Moll Echeto, Francisco de Borja; Unsal, Osman Sabri; Valero Cortés, Mateo; Cristal Kestelman, Adrián (Institute of Electrical and Electronics Engineers (IEEE), 2021)
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Accés obertSparse matrix operations are critical kernels in multiple application domains such as High Performance Computing, artificial intelligence and big data. Vector processing is widely used to improve performance on mathematical ... -
ViPS: Visual processing system for medical imaging
Hussain, Tassadaq; Palomar, Oscar; Cristal Kestelman, Adrián; Ayguadé Parra, Eduard; Haider, Amna (Institute of Electrical and Electronics Engineers (IEEE), 2015)
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Accés obertImaging has become an indispensable tool in modern medicine. Various powerful and expensive platforms to study medical imaging applications appear in recent years. In this article, we design and propose a Visual Processing ... -
Vitruvius+: An area-efficient RISC-V decoupled vector coprocessor for high performance computing applications
Minervini Minervini, Francesco; Palomar Pérez, Óscar; Unsal, Osman Sabri; Reggiani, Enrico; Quiroga Esparza, Josué Vladimir; Marimon Illana, Joan; Rojas Morales, Carlos; Figueras Bagué, Roger; Ruíz Ramírez, Abraham Josafat; González Trejo, Alberto; Mendoza Escobar, Jonnatan; Vargas Valdivieso, Ivan; Hernández Calderón, César Alejandro; Cabre Olive, Joan; Khoirunisya, Lina; Bouhali, Mustapha; Pavón Rivera, Julián; Moll Echeto, Francisco de Borja; Olivieri, Mauro; Kovac, Mario; Kovac, Mate; Dragic, Leon; Valero Cortés, Mateo; Cristal Kestelman, Adrián (2023-03-01)
Article
Accés obertThe maturity level of RISC-V and the availability of domain-specific instruction set extensions, like vector processing, make RISC-V a good candidate for supporting the integration of specialized hardware in processor cores ... -
VPPET: virtual platform power and energy estimation tool for heterogeneous MPSoC based FPGA platforms
Rethinagiri, Santhosh Kumar; Palomar Pérez, Óscar; Arias Moreno, Francisco Javier; Unsal, Osman Sabri; Cristal Kestelman, Adrián (Institute of Electrical and Electronics Engineers (IEEE), 2014)
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Accés restringit per política de l'editorialUsing low-power symmetric multi-cores on FPGAs are becoming ubiquitous in embedded computing. This is due to the emergence of power and energy as key design metrics, as important as performance. This leads to the requirement ... -
VSR sort: a novel vectorised sorting algorithm and architecture extensions for future microprocessors
Hayes, Timothy; Palomar Pérez, Óscar; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2015)
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Accés obertSorting is a widely studied problem in computer science and an elementary building block in many of its subfields. There are several known techniques to vectorise and accelerate a handful of sorting algorithms by using ... -
WormBench: technical report
Zyulkyarov, Ferad Hasanov; Cvijic, Sanja; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Ayguadé Parra, Eduard; Harris, Tim; Valero Cortés, Mateo (2008-08)
Report de recerca
Accés obertTransactional Memory (TM) is a promising new technology that makes it possible to ease writing multi-threaded applications. Many different TM implementations exist, unfortunately most of those TM systems are currently ...