Exploració per autor "Codina Viñas, Josep M."
Ara es mostren els items 8-10 de 10
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Graph-partitioning based instruction scheduling for clustered processors
Aleta Ortega, Alexandre; Codina Viñas, Josep M.; Sánchez Navarro, F. Jesús; González Colás, Antonio María (Institute of Electrical and Electronics Engineers (IEEE), 2001)
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Accés obertThis paper presents a novel scheme to schedule loops for clustered microarchitectures. The scheme is based on a preliminary cluster assignment phase implemented through graph partitioning techniques followed by a scheduling ... -
Instruction replication for clustered microarchitectures
Aleta Ortega, Alexandre; Codina Viñas, Josep M.; González Colás, Antonio María; David, Kaeli (Institute of Electrical and Electronics Engineers (IEEE), 2003)
Text en actes de congrés
Accés obertThis work presents a new compilation technique that uses instruction replication in order to reduce the number of communications executed on a clustered microarchitecture. For such architectures, the need to communicate ... -
Virtual cluster scheduling through the scheduling graph
Codina Viñas, Josep M.; Sánchez Navarro, Jesús; González Colás, Antonio María (Institute of Electrical and Electronics Engineers (IEEE), 2007)
Text en actes de congrés
Accés obertThis paper presents an instruction scheduling and cluster assignment approach for clustered processors. The proposed technique makes use of a novel representation named the scheduling graph which describes all possible ...