Ara es mostren els items 30-47 de 47

    • OmpSs@cloudFPGA: An FPGA task-based programming model with message passing 

      Haro Ruiz, Juan Miguel de; Cano, Rubén; Álvarez Martínez, Carlos; Jiménez González, Daniel; Martorell Bofill, Xavier; Ayguadé Parra, Eduard; Labarta Mancho, Jesús José; Abel, François; Ringlein, Burkhard; Weiss, Beat (Institute of Electrical and Electronics Engineers (IEEE), 2022)
      Text en actes de congrés
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      Nowadays, a new parallel paradigm for energy-efficient heterogeneous hardware infrastructures is required to achieve better performance at a reasonable cost on high-performance computing applications. Under this new paradigm, ...
    • OmpSs@FPGA framework for high performance FPGA computing 

      Haro Ruiz, Juan Miguel de; Bosch Pons, Jaume; Filgueras Izquierdo, Antonio; Vidal, Miquel; Jiménez González, Daniel; Álvarez Martínez, Carlos; Martorell Bofill, Xavier; Ayguadé Parra, Eduard; Labarta Mancho, Jesús José (Institute of Electrical and Electronics Engineers (IEEE), 2021-12-01)
      Article
      Accés obert
      This paper presents the new features of the OmpSs@FPGA framework. OmpSs is a data-flow programming model that supports task nesting and dependencies to target asynchronous parallelism and heterogeneity. OmpSs@FPGA is the ...
    • OmpSs@Zynq All-Programmable SoC Ecosystem 

      Filgueras Izquierdo, Antonio; Gil Blasco, Eduard; Jiménez González, Daniel; Álvarez Martínez, Carlos; Martorell Bofill, Xavier; Langer, Jan; Noguera Serra, Juan José; Vissers, Kees (Association for Computing Machinery (ACM), 2014)
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      OmpSs is an OpenMP-like directive-based programming model that includes heterogeneous execution (MIC, GPU, SMP, etc.) and runtime task dependencies management. Indeed, OmpSs has largely influenced the recently appeared ...
    • Performance analysis of a hardware accelerator of dependence management for taskbased dataflow programming models 

      Tan, Xubin; Bosch Pons, Jaume; Jiménez González, Daniel; Álvarez Martínez, Carlos; Ayguadé Parra, Eduard; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2016)
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      Along with the popularity of multicore and manycore, task-based dataflow programming models obtain great attention for being able to extract high parallelism from applications without exposing the complexity to programmers. ...
    • Picos: A hardware runtime architecture support for OmpSs 

      Yazdanpanah Ahmadabadi, Fahimeh; Álvarez Martínez, Carlos; Jiménez González, Daniel; Badia Sala, Rosa Maria; Valero Cortés, Mateo (Elsevier, 2015-12)
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      OmpSs is a programming model that provides a simple and powerful way of annotating sequential programs to exploit heterogeneity and task parallelism based on runtime data dependency analysis, dataflow scheduling and ...
    • ¿Por qué faltan a clase los alumnos? 

      Sánchez Carracedo, Fermín; Álvarez Martínez, Carlos; Fernández Jiménez, Agustín; Llosa Espuny, José Francisco (Asociación de Enseñantes Universitarios de la Informática (AENUI), 2017)
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      Como profesores, con frecuencia hemos observado que no todos los estudiantes asisten regularmente a clase y que, en momentos puntuales del curso, una cantidad significativa de ellos desaparece de las aulas. La mayoría de ...
    • Preliminary work on a mechanism for testing a customized architecture 

      González, Cecilia; Jiménez González, Daniel; Martorell Bofill, Xavier; Álvarez Martínez, Carlos; Gaydadjiev, Georgi (2009-07)
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      Hardware customization for scientific applications has shown a big potential for reducing power consumption and increasing performance. In particular, the automatic generation of ISA extensions for General-Purpose Processors ...
    • Simulating next-generation Cyber-physical computing platforms 

      Burgio, Paolo; Álvarez Martínez, Carlos; Ayguadé Parra, Eduard; Filgueras Izquierdo, Antonio; Jiménez González, Daniel; Martorell Bofill, Xavier; Navarro, Nacho; Giorgi, Roberto (2015)
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      In specific domains, such as cyber-physical systems, platforms are quickly evolving to include multiple (many-) cores and programmable logic in a single system-on-chip, while includ- ing interfaces to commodity ...
    • Supporting task creation inside FPGA devices 

      Bosch Pons, Jaume; Álvarez Martínez, Carlos; Jiménez González, Daniel (Barcelona Supercomputing Center, 2019-05-07)
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      The most common model to use co-processors/accelerators is the master-slave model where the slaves (coprocessors/ accelerators) are driven by a general purpose cpu. This simplifies the management of the accelerators because ...
    • Task dependences management hardware acceleration for task-based dataflow programming models 

      Tan, Xubin; Álvarez Martínez, Carlos; Jiménez González, Daniel; Ayguadé Parra, Eduard; Valero Cortés, Mateo (Barcelona Supercomputing Center, 2015-05-05)
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      Task-based programming models have gained a lot of attention for being able to explore high parallelism over multicore and manycore, while hiding the difficulties of parallel programming. For applications with moderate ...
    • Task-based programming models for heterogeneous recurrent workloads 

      Bosch Pons, Jaume; Vidal, Miquel; Filgueras Izquierdo, Antonio; Jiménez González, Daniel; Álvarez Martínez, Carlos; Martorell Bofill, Xavier; Ayguadé Parra, Eduard (Springer Nature, 2021)
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      This paper proposes the extension of task-based programming models with recurrent workloads concepts. The proposal introduces new clauses in the OmpSs task directive to efficiently model recurrent workloads. The clauses ...
    • TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale 

      Agosta, Giovanni; Cattaneo, Daniele; Fornaciari, William; Galimberti, Andrea; Massari, Giuseppe; Reghenzani, Federico; Terraneo, Federico; Filgueras Izquierdo, Antonio; Vidal, Miquel; Álvarez Martínez, Carlos; Martorell Bofill, Xavier (Institute of Electrical and Electronics Engineers (IEEE), 2021)
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      To achieve high performance and high energy efficiency on near-future exascale computing systems, three key technology gaps needs to be bridged. These gaps include: energy efficiency and thermal control; extreme computation ...
    • The AXIOM platform for next-generation cyber physical systems 

      Theodoropoulos, Dimitris; Mazumdar, Somnath; Ayguadé Parra, Eduard; Bettin, Nicola; Bueno Hedo, Javier; Ermini, Sara; Filgueras Izquierdo, Antonio; Jiménez González, Daniel; Álvarez Martínez, Carlos; Martorell Bofill, Xavier; Montefoschi, Francesco; Oro Garcia, David; Pnevmatikatos, Dionisis; Rizzo, Antonio; Gai, Paolo; Garzarella, Stefano; Morelli, Bruno; Pomella, Alberto; Giorgi, Roberto (2017-06-03)
      Article
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      Cyber-Physical Systems (CPSs) are widely used in many applications that require interactions between humans and their physical environment. These systems usually integrate a set of hardware-software components for optimal ...
    • The AXIOM project: IoT on heterogeneous embedded platforms 

      Filgueras Izquierdo, Antonio; Vidal, Miquel; Mateu, Marc; Jiménez González, Daniel; Álvarez Martínez, Carlos; Martorell Bofill, Xavier; Ayguadé Parra, Eduard; Theodoropoulos, Dimitris; Pnevmatikatos, Dionisis; Gai, Paolo; Garzarella, Stefano; Oro de Herta, David; Hernando Pericás, Francisco Javier; Bettin, Nicola; Pomella, Alberto; Giorgi, Roberto (Institute of Electrical and Electronics Engineers (IEEE), 2019-11-11)
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      The AXIOM project aims at providing an environment for Cyber-Physical Systems. Smart Video Surveillance targets public environments, involving real-time face detection in crowds. Smart Home Living targets home environments ...
    • Towards EXtreme scale technologies and accelerators for euROhpc hw/Sw supercomputing applications for exascale: The TEXTAROSSA approach 

      Agosta, Giovanni; Aldinucci, Marco; Álvarez Martínez, Carlos; Ammendola, Roberto; Arfat, Yasir; Beaumont, Olivier; Bernaschi, Massimo; Filgueras Izquierdo, Antonio; Martorell Bofill, Xavier; Vidal, Miquel (2022-11)
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      Accés restringit per política de l'editorial
      In the near future, Exascale systems will need to bridge three technology gaps to achieve high performance while remaining under tight power constraints: energy efficiency and thermal control; extreme computation efficiency ...
    • Towards reconfigurable accelerators in HPC: Designing a multipurpose eFPGA tile for heterogeneous SoCs 

      Hotfilter, Tim; Kreß, Fabian; Kempf, Fabian; Becker, Jürgen; Haro Ruiz, Juan Miguel de; Jiménez González, Daniel; Moretó Planas, Miquel; Álvarez Martínez, Carlos; Labarta Mancho, Jesús José; Baili, Imen (Institute of Electrical and Electronics Engineers (IEEE), 2022)
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      The goal of modern high performance computing platforms is to combine low power consumption and high throughput. Within the European Processor Initiative (EPI), such an SoC platform to meet the novel exascale requirements ...
    • Una herramienta automática de feedback para ensamblador 

      Álvarez Martínez, Carlos; Jiménez González, Daniel; López Álvarez, David; Alonso López, Javier; Tous Liesa, Rubén; Parcerisa Bundó, Joan Manuel; Barlet Ros, Pere; Fernández Barta, Montserrat; Tubella Murgadas, Jordi; Pérez, Christian (2008-10)
      Report de recerca
      Accés obert
      Un estudiante de primer curso de Ingeniería en Informática debe adquirir la capacidad de analizar y depurar códigos, tanto a alto nivel como en ensamblador. Este proceso requiere una participación activa por parte de los ...
    • Uso del simulador SimpleReuse 

      Álvarez Martínez, Carlos; Valero Cortés, Mateo (2005-11)
      Report de recerca
      Accés obert
      Este report explica el funcionamiento del simulador SimpleReuse (una evolución de SimpleScalar y Wattch) para su uso en simulación de reuso de instrucciones o regiones. Este simulador realiza medidas de tiempo, instrucciones ...