Exploració per autor "Moll Echeto, Francisco de Borja"
Ara es mostren els items 90-98 de 98
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Variability-tolerant memristor-based ratioed logic in crossbar array
(Institute of Electrical and Electronics Engineers (IEEE), 2018)
Text en actes de congrés
Accés obertThe advent of the first TiO2-based memristor in 2008 revived the scientific interest both from academia and industry for this de- vice technology, with several emerging applications including that of logic circuits. Several ... -
Variation tolerant self-adaptive clock generation architecture based on a ring oscillator
(Institute of Electrical and Electronics Engineers (IEEE), 2012)
Comunicació de congrés
Accés obertIn this work we propose a self-adaptive clock based on a ring oscillator as the solution for the increasing uncertainty in the critical path delay. This increase in uncertainty forces to add more safety margins to the ... -
Variations-aware circuit designs for microprocessors
(2010)
Comunicació de congrés
Accés obertA new trend that is becoming dominant is to improve layout regularity so that the layouts to be printed are more repetitive and easy to manufacture. Our proposal is to push to the limit layout regularity to minimize ... -
VCTA: A Via-Configurable Transistor Array regular fabric
(IEEE Computer Society Publications, 2010)
Text en actes de congrés
Accés obertLayout regularity is introduced progressively by integrated circuit manufacturers to reduce the increasing systematic process variations in the deep sub-micron era. In this paper we focus on a scenario where layout regularity ... -
Via-configurable transistors array: a regular design technique to improve ICs yield
(Institute of Electrical and Electronics Engineers (IEEE), 2007)
Text en actes de congrés
Accés obertProcess variations are a major bottleneck for digital CMOS integrated circuits manufacturability and yield. That is why regular techniques with different degrees of regularity are emerging as possible solutions. Our ... -
VIA: A smart scratchpad for vector units with application to sparse matrix computations
(Institute of Electrical and Electronics Engineers (IEEE), 2021)
Text en actes de congrés
Accés obertSparse matrix operations are critical kernels in multiple application domains such as High Performance Computing, artificial intelligence and big data. Vector processing is widely used to improve performance on mathematical ... -
Vitruvius+: An area-efficient RISC-V decoupled vector coprocessor for high performance computing applications
(2023-03-01)
Article
Accés obertThe maturity level of RISC-V and the availability of domain-specific instruction set extensions, like vector processing, make RISC-V a good candidate for supporting the integration of specialized hardware in processor cores ... -
Voltage fluctuations in IC power supply distribution
(2007-11)
Text en actes de congrés
Accés obertThe supply voltage decrease and power consumption increase of modern ICs made the requirements for low voltage fluctuation caused by packaging and on-chip parasitic impedances more difficult to achieve. Most of the research ... -
Yield estimation model for lithography hotspot distortions
(Institution of Electrical Engineers, 2013-08-15)
Article
Accés restringit per política de l'editorialA yield formulation model to estimate the amount of lithography distortion expected in a printed layout is proposed. The yield formulation relates the probability of non-failure of a lithography hotspot with the yield ...
