Ara es mostren els items 19-38 de 98

    • Closed loop controlled ring oscillator: a variation tolerant self-adaptive clock generation architecture 

      Pérez Puigdemont, Jordi; Calomarde Palomino, Antonio; Moll Echeto, Francisco de Borja (2012)
      Comunicació de congrés
      Accés obert
    • Current balancing random body bias in FDSOI cryptosystems as a countermeasure to leakage power analysis attacks 

      Palma Carmona, Kenneth; Moll Echeto, Francisco de Borja (Institute of Electrical and Electronics Engineers (IEEE), 2022)
      Article
      Accés obert
      This paper identifies vulnerabilities to recently proposed countermeasures to leakage power analysis attacks in FDSOI systems based on the application of a random body bias. The vulnerabilities are analyzed and the relative ...
    • Data relevance-aware dynamic sensing technique with battery lifetime guarantee for wireless sensor nodes 

      Arnaiz, David; Moll Echeto, Francisco de Borja; Alarcón Cot, Eduardo José; Vilajosana, Ignasi (Institute of Electrical and Electronics Engineers (IEEE), 2021)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      Significant effort has been devoted to the development of dynamic monitoring techniques to exploit the temporal correlation among observations with the intention of improving the energy efficiency in wireless sensor nodes. ...
    • Design and implementation of an adaptive proactive reconfiguration technique in SRAM caches 

      Pouyan, Peyman; Amat Bertran, Esteve; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio (2013)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      Scaling of device dimensions toward nano-scale regime has made it essential to innovate novel design techniques for improving the circuit robustness. This work proposes an implementation of adaptive proactive reconfiguration ...
    • Design guidelines towards compact litho-friendly regular cells 

      Gómez Fernández, Sergio; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Elhoj, Martin; Schlinker, Guilherme; Woolaway, Nigel (2011)
      Text en actes de congrés
      Accés obert
    • Design of complex circuits using the via-configurable transistor array regular layout fabric 

      Pons Solé, Marc; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Abella Ferrer, Jaume; Vera Rivera, Francisco Javier; González Colás, Antonio María (IEEE Computer Society Publications, 2011)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      Layout regularity will be mandatory for future CMOS technologies to mitigate manufacturability issues. However, existing CAD tools do not meet the needs imposed by regularity constraints. In this paper we present a new ...
    • Diseño de circuitos y sistemas integrados 

      Rubio Sola, Jose Antonio; Altet Sanahujes, Josep; Aragonès Cervera, Xavier; González Jiménez, José Luis; Mateo Peña, Diego; Moll Echeto, Francisco de Borja (Edicions UPC, 2000)
      Llibre
      Accés restringit a la comunitat UPC
      La tecnología de circuitos integrados, basada principalmente en la miniaturización de los circuitos -con el incremento de prestaciones y la fuerte reducción de costos consiguientes– ha evolucionado intensamente en los ...
    • Diseño de circuitos y sistemas integrados 

      Rubio Sola, Jose Antonio; Altet Sanahujes, Josep; Aragonès Cervera, Xavier; González Jiménez, José Luis; Mateo Peña, Diego; Moll Echeto, Francisco de Borja (Edicions UPC, 2003)
      Llibre
      Accés restringit als usuaris de la UB, UAB, UPC, UPF, UdG, UdL, URV, UOC, BC, UVic, UJI, URL, UIC
      La tecnología de circuitos integrados, basada principalmente en la miniaturización de los circuitos ha evolucionado intensamente en los últimos tiempos. El objetivo de esta obra es dar a conocer esta evolución reciente y ...
    • DVINO: A RISC-V vector processor implemented in 65nm technology 

      Cabo Pitarch, Guillem; Candon, Gerard; Carril, Xavier; Doblas Font, Max; Dominguez de la Rocha, Marc; González Trejo, Alberto; Hernández Calderón, César Alejandro; Jiménez Arador, Víctor; Kostalampros, Ioannis-Vatistas; Langarita Benítez, Rubén; Leyva Santes, Neiel Israel; López Paradís, Guillem; Mendoza Escobar, Jonnatan; Minervini Minervini, Francesco; Pavón Rivera, Julián; Ramírez Lazo, Cristóbal; Rodas, Narcis; Reggiani, Enrico; Rodriguez, Mario; Rojas Morales, Carlos; Ruíz Ramírez, Abraham Josafat; Soria Pardos, Víctor; Vargas Valdivieso, Iván; Figueras Bagué, Roger; Fontova, Pau; Marimon Illana, Joan; Montabes, Víctor; Cristal Kestelman, Adrián; Hernández Luz, Carles; Moretó Planas, Miquel; Moll Echeto, Francisco de Borja; Palomar Pérez, Óscar; Rubio Sola, Jose Antonio; Sonmez, Nehir; Unsal, Osman Sabri; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2022)
      Comunicació de congrés
      Accés obert
      This paper describes the design, verification, implementation and fabrication of the Drac Vector IN-Order (DVINO) processor, a RISC-V vector processor capable of booting Linux jointly developed by BSC, CIC-IPN, IMB-CNM ...
    • Energy and relevance-aware adaptive monitoring method for wireless sensor nodes with hard energy constraints 

      Arnaiz Martínez, David Mariano; Moll Echeto, Francisco de Borja; Alarcón Cot, Eduardo José; Vilajosana Guillén, Xavier (2024-01-01)
      Article
      Accés obert
      Traditional dynamic energy management methods optimize the energy usage in wireless sensor nodes adjusting their behavior to the operating conditions. However, this comes at the cost of losing the predictability in the ...
    • Energy efficient object detection for automotive applications with YOLOv3 and approximate hardware 

      Fornt Mas, Jordi; Fontova Muste, Pau; Caro Roca, Martí; Abella Ferrer, Jaume; Moll Echeto, Francisco de Borja; Altet Sanahujes, Josep; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 2023)
      Text en actes de congrés
      Accés obert
      Deep neural networks are the dominant models for perception tasks in the automotive domain, but their high computational complexity makes it difficult to execute them in real time with an acceptable power consumption on ...
    • Energy macro-model for on chip interconnection buses 

      Mendoza Vázquez, Raymundo; Pons Solé, Marc; Moll Echeto, Francisco de Borja; Figueras, Joan (2006-06)
      Report de recerca
      Accés obert
      This report presents a fast method of evaluating the power consumption of a bus. Given an on-chip bus driver-interconnection-receiver design of N parallel lines,the objective is to develop its energy consumption macro-model. ...
    • Error probability in synchronous digital circuits due to power supply noise 

      Martorell Cid, Ferran; Pons Solé, Marc; Rubio Sola, Jose Antonio; Moll Echeto, Francisco de Borja (2007-09)
      Text en actes de congrés
      Accés obert
      This paper presents a probabilistic approach to model the problem of power supply voltage fluctuations. Error probability calculations are shown for some 90-nm technology digital circuits. The analysis here considered ...
    • Error probability in synchronous digital circuits due to power supply noise 

      Martorell Cid, Ferran; Pons, M; Rubio Sola, Jose Antonio; Moll Echeto, Francisco de Borja (???, 2007)
      Text en actes de congrés
      Accés obert
      This paper presents a probabilistic approach to model the problem of power supply voltage fluctuations. Error probability calculations are shown for some 90-nm technology digital circuits. The analysis here considered ...
    • EXAMEN FINAL 

      Moll Echeto, Francisco de Borja; Cosp Vilella, Jordi (Universitat Politècnica de Catalunya, 2022-05-30)
      Examen
      Accés restringit a la comunitat UPC
    • EXAMEN FINAL 

      Moll Echeto, Francisco de Borja; Cosp Vilella, Jordi (Universitat Politècnica de Catalunya, 2022-05-30)
      Examen
      Accés restringit a la comunitat UPC
    • Examen Final 

      Madrenas Boadas, Jordi; Moll Echeto, Francisco de Borja; Cosp Vilella, Jordi (Universitat Politècnica de Catalunya, 2023-05-30)
      Examen
      Accés restringit a la comunitat UPC
    • Examen Final 

      Moreno Aróstegui, Juan Manuel; Cabestany Moncusí, Joan; Rubio Sola, Jose Antonio; Moll Echeto, Francisco de Borja (Universitat Politècnica de Catalunya, 2014-01-10)
      Examen
      Accés restringit a la comunitat UPC
    • Examen Final 

      Aragonès Cervera, Xavier; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Altet Sanahujes, Josep; Gómez, Sergio (Universitat Politècnica de Catalunya, 2013-06-26)
      Examen
      Accés restringit a la comunitat UPC
    • Experience on material implication computing with an electromechanical memristor emulator 

      Rubio Sola, Jose Antonio; Moll Echeto, Francisco de Borja; Escudero López, Manuel; Zuin, Stefano; Vourkas, Ioannis; Sirakoulis, Georgios (IEEE Press, 2016)
      Text en actes de congrés
      Accés obert
      Memristors are being considered as a promising emerging device able to introduce new paradigms in both data storage and computing. In this paper the authors introduce the concept of a quasi-ideal experimental device that ...