Exploració per autor "Moll Echeto, Francisco de Borja"Més informacióMés informació

Ara es mostren els items 29-48 de 98

    • Energy efficient object detection for automotive applications with YOLOv3 and approximate hardware 

      Fornt Mas, Jordi; Fontova Muste, Pau; Caro Roca, Martí; Abella Ferrer, Jaume; Moll Echeto, Francisco de Borja; Altet Sanahujes, Josep; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 2023)
      Text en actes de congrés
      Accés obert
      Deep neural networks are the dominant models for perception tasks in the automotive domain, but their high computational complexity makes it difficult to execute them in real time with an acceptable power consumption on ...

    • Energy macro-model for on chip interconnection buses 

      Mendoza Vázquez, Raymundo; Pons Solé, Marc; Moll Echeto, Francisco de Borja; Figueras, Joan (2006-06)
      Report de recerca
      Accés obert
      This report presents a fast method of evaluating the power consumption of a bus. Given an on-chip bus driver-interconnection-receiver design of N parallel lines,the objective is to develop its energy consumption macro-model. ...

    • Error probability in synchronous digital circuits due to power supply noise 

      Martorell Cid, Ferran; Pons Solé, Marc; Rubio Sola, Jose Antonio; Moll Echeto, Francisco de Borja (2007-09)
      Text en actes de congrés
      Accés obert
      This paper presents a probabilistic approach to model the problem of power supply voltage fluctuations. Error probability calculations are shown for some 90-nm technology digital circuits. The analysis here considered ...

    • Error probability in synchronous digital circuits due to power supply noise 

      Martorell Cid, Ferran; Pons, M; Rubio Sola, Jose Antonio; Moll Echeto, Francisco de Borja (???, 2007)
      Text en actes de congrés
      Accés obert
      This paper presents a probabilistic approach to model the problem of power supply voltage fluctuations. Error probability calculations are shown for some 90-nm technology digital circuits. The analysis here considered ...

    • EXAMEN FINAL 

      Moll Echeto, Francisco de Borja; Cosp Vilella, Jordi (Universitat Politècnica de Catalunya, 2022-05-30)
      Examen
      Accés restringit a la comunitat UPC

    • EXAMEN FINAL 

      Moll Echeto, Francisco de Borja; Cosp Vilella, Jordi (Universitat Politècnica de Catalunya, 2022-05-30)
      Examen
      Accés restringit a la comunitat UPC

    • Examen Final 

      Madrenas Boadas, Jordi; Moll Echeto, Francisco de Borja; Cosp Vilella, Jordi (Universitat Politècnica de Catalunya, 2023-05-30)
      Examen
      Accés restringit a la comunitat UPC

    • Examen Final 

      Moreno Aróstegui, Juan Manuel; Cabestany Moncusí, Joan; Rubio Sola, Jose Antonio; Moll Echeto, Francisco de Borja (Universitat Politècnica de Catalunya, 2014-01-10)
      Examen
      Accés restringit a la comunitat UPC

    • Examen Final 

      Aragonès Cervera, Xavier; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Altet Sanahujes, Josep; Gómez, Sergio (Universitat Politècnica de Catalunya, 2013-06-26)
      Examen
      Accés restringit a la comunitat UPC

    • Experience on material implication computing with an electromechanical memristor emulator 

      Rubio Sola, Jose Antonio; Moll Echeto, Francisco de Borja; Escudero López, Manuel; Zuin, Stefano; Vourkas, Ioannis; Sirakoulis, Georgios (IEEE Press, 2016)
      Text en actes de congrés
      Accés obert
      Memristors are being considered as a promising emerging device able to introduce new paradigms in both data storage and computing. In this paper the authors introduce the concept of a quasi-ideal experimental device that ...

    • Fast time-to-market with via-configurable transistor array regular fabric: A delay-locked loop design case study 

      González Colás, Antonio María; Pons Solé, Marc; Barajas Ojeda, Enrique; Mateo Peña, Diego; López González, Juan Miguel; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Abella Ferrer, Jaume; Vera Rivera, Francisco Javier (IEEE Computer Society Publications, 2011)
      Comunicació de congrés
      Accés restringit per política de l'editorial
      Time-to-market is a critical issue for nowadays integrated circuits manufacturers. In this paper the Via-Configurable Transistor Array regular layout fabric (VCTA), which aims to minimize the time-to-market and its associated ...

    • Final Exam. Part 1 

      Madrenas Boadas, Jordi; Moll Echeto, Francisco de Borja (Universitat Politècnica de Catalunya, 2021-01-12)
      Examen
      Accés restringit a la comunitat UPC

    • FOCSI: A new layout regularity metric 

      Pons Solé, Marc; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Abella Ferrer, Jaume; Vera Rivera, Francisco Javier; González Colás, Antonio María (2009-06-09)
      Report de recerca
      Accés obert
      Digital CMOS Integrated Circuits (ICs) suffer from serious layout features printability issues associated to the lithography manufacturing process. Regular layout designs are emerging as alternative solutions to reduce ...

    • Influència de les Interconnexions en Disseny Microelectrònic 

      Moll Echeto, Francisco de Borja (Universitat Politècnica de Catalunya, 1995-03-31)
      Tesi
      Accés obert
      Debido a los actuales niveles de integración que permite la tecnología de fabricación de circuitos integrados, las interconexiones juegan cada vez un papel más importante en el comportamiento de dichos circuitos introduciendo ...

    • Insights into tunnel FET-based charge pumps and rectifiers for energy harvesting applications 

      Nunes Cavalheiro, David Manuel; Moll Echeto, Francisco de Borja; Valtchev, Stanimir (2017-03-01)
      Article
      Accés obert
      In this paper, the electrical characteristics of tunnel field-effect transistor (TFET) devices are explored for energy harvesting front-end circuits with ultralow power consumption. Compared with conventional thermionic ...

    • Introduction to VHDL I 

      Altet Sanahujes, Josep; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio (2020-09-22)
      Audiovisual
      Accés obert

    • Introduction to VHDL II 

      Altet Sanahujes, Josep; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio (2020-09-22)
      Audiovisual
      Accés obert

    • Introduction to VHDL III 

      Altet Sanahujes, Josep; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio (2020-09-22)
      Audiovisual
      Accés obert

    • Introduction to VHDL IV 

      Altet Sanahujes, Josep; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio (2020-09-22)
      Audiovisual
      Accés obert

    • Introduction to VHDL V 

      Altet Sanahujes, Josep; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio (2020-09-22)
      Audiovisual
      Accés obert