Exploració per autor "Martorell Bofill, Xavier"
Ara es mostren els items 84-103 de 140
-
O(n) key–value sort with active compute memory
(Institute of Electrical and Electronics Engineers (IEEE), 2024-05)
Article
Accés obertWe propose the Active Compute Memory (ACM), a near-memory-processing architecture capable of performing key–value sort directly in the DRAM. In the ACM architecture, sort is merely the writing of data into memory with one ... -
OmpSs@cloudFPGA: An FPGA task-based programming model with message passing
(Institute of Electrical and Electronics Engineers (IEEE), 2022)
Text en actes de congrés
Accés obertNowadays, a new parallel paradigm for energy-efficient heterogeneous hardware infrastructures is required to achieve better performance at a reasonable cost on high-performance computing applications. Under this new paradigm, ... -
OmpSs@FPGA framework for high performance FPGA computing
(Institute of Electrical and Electronics Engineers (IEEE), 2021-12-01)
Article
Accés obertThis paper presents the new features of the OmpSs@FPGA framework. OmpSs is a data-flow programming model that supports task nesting and dependencies to target asynchronous parallelism and heterogeneity. OmpSs@FPGA is the ... -
OmpSs@Zynq All-Programmable SoC Ecosystem
(Association for Computing Machinery (ACM), 2014)
Text en actes de congrés
Accés restringit per política de l'editorialOmpSs is an OpenMP-like directive-based programming model that includes heterogeneous execution (MIC, GPU, SMP, etc.) and runtime task dependencies management. Indeed, OmpSs has largely influenced the recently appeared ... -
On the instrumentation of OpenMP and OmpSs Tasking constructs
(Springer, 2012)
Text en actes de congrés
Accés obertParallelism has become more and more commonplace with the advent of the multicore processors. Although different parallel pro- gramming models have arisen to exploit the computing capabilities of such processors, ... -
OpenMP extensions for FPGA Accelerators
(2009-07)
Text en actes de congrés
Accés obertReconfigurable computing is one of the paths to explore towards low-power supercomputing. However, programming these reconfigurable devices is not an easy task and still requires significant research and development efforts ... -
OpenMP tasking analysis for programers
(2009-11)
Text en actes de congrés
Accés restringit per política de l'editorialAs of 2008, the OpenMP 3.0 standard includes task support allowing programmers to exploit irregular parallelism. Although several compilers are providing support for this new feature there has not been extensive investigation ... -
OpenMP tasks in IBM XL compilers
(Association for Computing Machinery (ACM), 2008)
Comunicació de congrés
Accés obertTasking is the most significant feature included in the new OpenMP 3.0 standard. It was introduced to handle unstructured parallelism and broaden the range of applications that can be parallelized by OpenMP. This paper ... -
Optimizing NANOS OpenMP for the IBM Cyclops multithreaded architecture
(Institute of Electrical and Electronics Engineers (IEEE), 2005)
Text en actes de congrés
Accés obertIn this paper, we present two approaches to improve the execution of OpenMP applications on the IBM Cyclops multithreaded architecture. Both solutions are independent and they are focused to obtain better performance through ... -
Optimizing the exploitation of multicore processors and GPUs with OpenMP and OpenCL
(2011)
Article
Accés restringit per política de l'editorialIn this paper, we present OMPSs, a programming model based on OpenMP and StarSs, that can also incorporate the use of OpenCL or CUDA kernels. We evaluate the proposal on three different architectures, SMP, Cell/B.E. and ... -
Optimizing the exploitation of multicore processors and GPUs with OpenMP and OpenCL
(Springer, 2010)
Text en actes de congrés
Accés restringit per política de l'editorialIn this paper, we present OMPSs, a programming model based on OpenMP and StarSs, that can also incorporate the use of OpenCL or CUDA kernels. We evaluate the proposal on three different architectures, SMP, Cell/B.E. and ... -
Parallel programming issues and what the compiler can do to help
(Barcelona Supercomputing Center, 2015-05-05)
Text en actes de congrés
Accés obertTwenty-first century parallel programming models are becoming real complex due to the diversity of architectures they need to target (Multi- and Many-cores, GPUs, FPGAs, etc.). What if we could use one programming model ... -
Parallelware tools: an experimental evaluation on POWER systems
(Springer, 2019)
Text en actes de congrés
Accés obertStatic code analysis tools are designed to aid software developers to build better quality software in less time, by detecting defects early in the software development life cycle. Even the most experienced developer ... -
Particle-in-cell simulation using asynchronous tasking
(Springer Nature, 2021)
Text en actes de congrés
Accés obertRecently, task-based programming models have emerged as a prominent alternative among shared-memory parallel programming paradigms. Inherently asynchronous, these models provide native support for dynamic load balancing ... -
Performance and energy effects on task-based parallelized applications: User-directed versus manual vectorization
(2018-06)
Article
Accés obertHeterogeneity, parallelization and vectorization are key techniques to improve the performance and energy efficiency of modern computing systems. However, programming and maintaining code for these architectures poses a ... -
Preliminary work on a mechanism for testing a customized architecture
(2009-07)
Text en actes de congrés
Accés obertHardware customization for scientific applications has shown a big potential for reducing power consumption and increasing performance. In particular, the automatic generation of ISA extensions for General-Purpose Processors ... -
Productive cluster programming with OmpSs
(Springer, 2011)
Text en actes de congrés
Accés restringit per política de l'editorialClusters of SMPs are ubiquitous. They have been traditionally programmed by using MPI. But, the productivity of MPI programmers is low because of the complexity of expressing parallelism and communication, and the difficulty ... -
Productive programming of GPU clusters with OmpSs
(2012)
Comunicació de congrés
Accés restringit per política de l'editorialClusters of GPUs are emerging as a new computational scenario. Programming them requires the use of hybrid models that increase the complexity of the applications, reducing the productivity of programmers. We present ... -
Real-time GPU-based face detection in HD video sequences
(2011)
Comunicació de congrés
Accés restringit per política de l'editorialModern GPUs have evolved into fully programmable parallel stream multiprocessors. Due to the nature of the graphic workloads, computer vision algorithms are in good position to leverage the computing power of these ... -
Reducing compiler-inserted instrumentation in unified-parallel-C code generation
(Institute of Electrical and Electronics Engineers (IEEE), 2014)
Text en actes de congrés
Accés restringit per política de l'editorialPrograms written in Partitioned Global Address Space (PGAS) languages can access any location of the entire address space via standard read/write operations. However, the compiler have to create the communication mechanisms ...
