Ara es mostren els items 55-74 de 175

    • Effect of lattice defects on the transport properties of graphene nanoribbon 

      Rallis, Konstantinos; Dimitrakis, Panagiotis; Sirakoulis, Georgios; Karafyllidis, Ioannis; Rubio Sola, Jose Antonio (2019)
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      Graphene nanoribbons are the most emerging graphene structures for electronic applications. Here, we present our calculation results on the impact of lattice defects on the transport properties of these structures. Preliminary ...
    • Effective current-driven memory operations for low-power ReRAM applications 

      Cirera Hernandez, Albert; Garrido Fernández, Blas; Rubio Sola, Jose Antonio; Vourkas, Ioannis (Institute of Electrical and Electronics Engineers (IEEE), 2023-05-13)
      Article
      Accés obert
      Resistive switching (RS) devices are electronic components which exhibit a resistive state that can be adjusted to different nonvolatile levels via electrical stressing, fueling the development of future resistive memories ...
    • Effectiveness of hybrid recovery techniques on parametric failures 

      Ganapathy, Shrikanth; Canal Corretger, Ramon; González Colás, Antonio María; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 2013)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      Modern day microprocessors effectively utilise supply voltage scaling for tremendous power reduction. The minimum voltage beyond which a processor cannot operate reliably is defined as V ddmin. On-chip memories like caches ...
    • Eines d’autor: avaluació de noves eines orientades al desenvolupament de competències genèriques per la millora del procés d’aprenentatge autònom dels estudiants 

      Calomarde Palomino, Antonio; Rubio Sola, Jose Antonio; Vigara Campmany, Julio Enrique; Romeral Martínez, José Luis; Ortega Redondo, Juan Antonio (Universitat Politècnica de Catalunya. Institut de Ciències de l'Educació, 2013-02-08)
      Text en actes de congrés / Comunicació de congrés
      Accés obert
      Els cursos on-line massius (Massive Open On-line Courses) estan emergent i suposarà un gran repte en l’educació universitària en els propers anys. Universitats com Standford i MIT han començat aquest any cursos en obert ...
    • Electronic properties of graphene nanoribbons with defects 

      Rallis, Konstantinos; Dimitrakis, Panagiotis; Karafydillis, Ioannis; Rubio Sola, Jose Antonio; Sirakoulis, Georgios (2021-01-27)
      Article
      Accés obert
      Graphene nanoribbons (GNRs) are the most important emerging Graphene structures for nanoelectronic and sensor applications. GNRs with perfect lattices have been extensively studied, but fabricated GNRs contain lattice ...
    • Energy efficient object detection for automotive applications with YOLOv3 and approximate hardware 

      Fornt Mas, Jordi; Fontova Muste, Pau; Caro Roca, Martí; Abella Ferrer, Jaume; Moll Echeto, Francisco de Borja; Altet Sanahujes, Josep; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 2023)
      Text en actes de congrés
      Accés obert
      Deep neural networks are the dominant models for perception tasks in the automotive domain, but their high computational complexity makes it difficult to execute them in real time with an acceptable power consumption on ...
    • Error probability in synchronous digital circuits due to power supply noise 

      Martorell Cid, Ferran; Pons Solé, Marc; Rubio Sola, Jose Antonio; Moll Echeto, Francisco de Borja (2007-09)
      Text en actes de congrés
      Accés obert
      This paper presents a probabilistic approach to model the problem of power supply voltage fluctuations. Error probability calculations are shown for some 90-nm technology digital circuits. The analysis here considered ...
    • Error probability in synchronous digital circuits due to power supply noise 

      Martorell Cid, Ferran; Pons, M; Rubio Sola, Jose Antonio; Moll Echeto, Francisco de Borja (???, 2007)
      Text en actes de congrés
      Accés obert
      This paper presents a probabilistic approach to model the problem of power supply voltage fluctuations. Error probability calculations are shown for some 90-nm technology digital circuits. The analysis here considered ...
    • Examen Final 

      Moreno Aróstegui, Juan Manuel; Cabestany Moncusí, Joan; Rubio Sola, Jose Antonio; Moll Echeto, Francisco de Borja (Universitat Politècnica de Catalunya, 2014-01-10)
      Examen
      Accés restringit a la comunitat UPC
    • Examen Final 

      Aragonès Cervera, Xavier; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Altet Sanahujes, Josep; Gómez, Sergio (Universitat Politècnica de Catalunya, 2013-06-26)
      Examen
      Accés restringit a la comunitat UPC
    • Experience on material implication computing with an electromechanical memristor emulator 

      Rubio Sola, Jose Antonio; Moll Echeto, Francisco de Borja; Escudero López, Manuel; Zuin, Stefano; Vourkas, Ioannis; Sirakoulis, Georgios (IEEE Press, 2016)
      Text en actes de congrés
      Accés obert
      Memristors are being considered as a promising emerging device able to introduce new paradigms in both data storage and computing. In this paper the authors introduce the concept of a quasi-ideal experimental device that ...
    • Experimental investigation of memristance enhancement 

      Ntinas, Vasileios; Rubio Sola, Jose Antonio; Sirakoulis, Georgios; Rodriguez, Rosana; Nafría Maqueda, Montserrat (2019)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      Memristor devices are two-terminal nanoscale circuit elements that exhibit nonvolatile information storing and can be manufactured in ultra-dense arrays with low-power operation. Although, theoretically, memristors are ...
    • Experimental study of artificial neural networks using a digital memristor simulator 

      Ntinas, Vasileios; Vourkas, Ioannis; Abusleme, Angel; Sirakoulis, Georgios; Rubio Sola, Jose Antonio (2018-02-01)
      Article
      Accés obert
      This paper presents a fully digital implementation of a memristor hardware simulator, as the core of an emulator, based on a behavioral model of voltage-controlled threshold-type bipolar memristors. Compared to other analog ...
    • Experimental time evolution study of the HFO-based IMPLY gate operation 

      Maestro, M; Marin-Martinez, J.; Crespo-Yepes, A.; Escudero, Manel; Rodriguez, R.; Nafría Maqueda, Montserrat; Aymerich, X.; Rubio Sola, Jose Antonio (2018-02-01)
      Article
      Accés obert
      In the last years, memristor devices have been proposed as key elements to develop a new paradigm to implement logic gates. In particular, the memristor-based material implication (IMPLY) gate has been presented as a ...
    • Experimental verification of memristor-based material implication NAND operation 

      Maestro Izquierdo, Marcos; Martin Martínez, Javier; Crespo Yepes, Albert; Escudero López, Manuel; Rodríguez Martínez, Rosana; Nafría Maqueda, Montserrat; Aymerich Humet, Xavier; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 2017-10-11)
      Article
      Accés obert
      Memristors are being considered as promising devices for highly dense memory systems as well as the potential basis of new computational paradigms. In this scenario, and in relation with data processing, one of the more ...
    • Exploring different circuit-level approaches to the forming of resistive random access memories 

      Cirera, Albert; Fernandez, Carlos; Vourkas, Ioannis; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 2022)
      Text en actes de congrés
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      Advances in emerging resistive random-access memory (ReRAM) technology show promise to be used in future memory-centric computing systems. In ReRAM arrays that consist of two-terminal bipolar resistive switching (RS) ...
    • Exploring the voltage divider approach for accurate memristor state tuning 

      Vourkas, Ioannis; Gomez, Jorge; Abusleme, Angel; Vasileiadis, Nikolaos; Sirakoulis, Georgios; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 2017)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      The maximum exploitation of the favorable properties and the analog nature of memristor technology in future nonvolatile resistive memories, requires accurate multilevel programming. In this direction, we explore the voltage ...
    • Exploring the “resistance change per energy unit” as universal performance parameter for resistive switching devices 

      Gómez Mir, Jorge Tomás; Vourkas, Ioannis; Abusleme, Angel; Rodríguez Martínez, Rosana; Martin Martínez, Javier; Nafría Maqueda, Montserrat; Rubio Sola, Jose Antonio (2020-03-01)
      Article
      Accés obert
      Resistive switching (RS) device (memristor) technology is continuously maturing towards industrial establishment. There are RS devices that demonstrate an “incremental” (analog) switching behavior, whereas others change ...
    • Extending the fundamental error bounds for asymmetric error reliable computation 

      Aymerich Capdevila, Nivard; Rubio Sola, Jose Antonio (IEEE Industrial Electronics Society, 2013)
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      Future computing systems based on new emerging nanotechnologies will have to rely on very high failure rate devices. Therefore, the study of fault-tolerant architectures is of great interest today. One of the most challenging ...
    • Fast time-to-market with via-configurable transistor array regular fabric: A delay-locked loop design case study 

      González Colás, Antonio María; Pons Solé, Marc; Barajas Ojeda, Enrique; Mateo Peña, Diego; López González, Juan Miguel; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Abella Ferrer, Jaume; Vera Rivera, Francisco Javier (IEEE Computer Society Publications, 2011)
      Comunicació de congrés
      Accés restringit per política de l'editorial
      Time-to-market is a critical issue for nowadays integrated circuits manufacturers. In this paper the Via-Configurable Transistor Array regular layout fabric (VCTA), which aims to minimize the time-to-market and its associated ...