Ara es mostren els items 32-51 de 175

    • Beneficial role of noise in Hf-based memristors 

      Rodriguez, Rosana; Martin Martinez, Javier; Salvador, Emili; Crespo Yepes, Albert; Miranda, Enrique Alberto; Nafria, Montserrat; Rubio Sola, Jose Antonio; Ntinas, Vasileios; Sirakoulis, Georgios Ch. (Institute of Electrical and Electronics Engineers (IEEE), 2022)
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      The beneficial role of noise in the performance of Hf-based memristors has been experimentally studied. The addition of an external gaussian noise to the bias circuitry positively impacts the memristors characteristics by ...
    • Carbon nanotube growth process-related variablity in CNFET's 

      García Almudéver, Carmen; Rubio Sola, Jose Antonio (IEEE Press. Institute of Electrical and Electronics Engineers, 2011)
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      Accés restringit per política de l'editorial
      In silicon bulk CMOS technology the variability of the device parameters is a key drawback that may be a limiting factor for further miniaturizing nodes. Novel nanoscale beyond- CMOS devices are being studied such as carbon ...
    • CBRAM-based bio-inspired circuit for the emulation and treatment of the Parkinson’s Disease 

      Chatzipaschalis, Ioannis; Tsipas, Evangelos; Fyrigos, Iosif-Angelos; Rubio Sola, Jose Antonio; Sirakoulis, Georgios Ch. (2023-12-05)
      Article
      Accés restringit per decisió de l'autor
      In recent years, the intrinsic neuromorphic properties of memristor devices have led to their extensive use in brain-inspired circuits and systems. The development of brain-inspired (nano)circuits incorporating memristors ...
    • Characterization of random telegraph noise and its impact on reliability of SRAM sense amplifiers 

      Martín Martínez, Javier; Diaz, Javier; Rodríguez, Rosana; Nafría Maqueda, Montserrat; Aymerich Humet, Xavier; Roca Moreno, Elisenda; Fernández Fernández, Francisco V.; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 2014)
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      A new method for the analysis of multilevel Random Telegraph Noise (RTN) signals has been recently presented, which can also be applied in the case of large background noise. In this work, the method is extended to evaluate ...
    • Characterization of the substrate noise spectrum for mixed-signal ICs 

      Méndez Villegas, Miguel Ángel; Mateo Peña, Diego; Rubio Sola, Jose Antonio; González Jiménez, José Luis (Institute of Electrical and Electronics Engineers (IEEE), 2005)
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      This paper presents a simplified analytical model of the substrate noise generated by digital circuitry that captures the most relevant frequency domain characteristics and relates them with parameters of the digital circuit ...
    • Circuit propagation delay estimation through multivariate regression-based modeling under spatio-temporal variability 

      Ganapathy, Shrikanth; Canal Corretger, Ramon; González Colás, Antonio María; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 2010)
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      Accés restringit per política de l'editorial
      With every process generation, the problem of variability in physical parameters and environmental conditions poses a great challenge to the design of fast and reliable circuits. Propagation delays which decide circuit ...
    • Circuit topology and synthesis flow co-design for the development of computational ReRAM 

      Fernandez Hernandez, Carlos; Vourkas, Ioannis; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 2022)
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      Emerging memory technologies will play a decisive role in the quest for more energy-efficient computing systems. Computational ReRAM structures based on resistive switching devices (memristors) have been explored for ...
    • Compact thermo-diffusion based physical memristor model 

      Fyrigos, Iosif-Angelos; Chatzinikolaou, Theodoros Panagiotis; Ntinas, Vasileios; Kitsios, Stavros; Bousoulas, Panagiotis; Tsompanas, Michael-Antisthenis; Tsoukalas, Dimitris; Adamatzky, Andrew; Rubio Sola, Jose Antonio; Sirakoulis, Georgios Ch. (Institute of Electrical and Electronics Engineers (IEEE), 2022)
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      The threshold switching effect is critical in memristor devices for a range of applications, from crossbar design reliability to simulating neuromorphic features using artificial neural networks. The rich inherit dynamics ...
    • Controlled degradation stochastic resonance in adaptive averaging cell-based architectures 

      Aymerich Capdevila, Nivard; Cotofana, Sorin; Rubio Sola, Jose Antonio (2013-11)
      Article
      Accés restringit per política de l'editorial
      In this paper, we first analyze the degradation stochastic resonance (DSR) effect in the context of adaptive averaging (AD-AVG) architectures. The AD-AVG is the adaptive version of the well-known AVG architecture . It is ...
    • Converses sobre disseny digital: dubtes a l'hora de fer una simulació 

      Altet Sanahujes, Josep; Rubio Sola, Jose Antonio; Bardés Llorensí, Daniel; Calderer Cardona, Josep; Pons Nin, Joan; Mateo Peña, Diego; Martín, Isidro (Departament d'Enginyeria Electrònica, 2016-10-25)
      Audiovisual
      Accés obert
    • Coupled physarum-inspired memristor oscillators for neuron-like operations 

      Ntinas, Vasileios; Vourkas, Ioannis; Sirakoulis, Georgios Ch.; Adamatzky, Andrew; Rubio Sola, Jose Antonio (2018)
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      Unconventional computing has been studied intensively, even after the appearance of CMOS technology. Currently, it has returned to the spotlight because CMOS is about to reach its physical limits, given that the constant ...
    • Cross-talk extraction from mask layout 

      Sicard, E.; Demonchaux, T.; Noullet, J.L.; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 1993)
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      The principles of an automated cross-talk extractor from the mask-level description of a CMOS integrated circuit are detailed. The physical extraction principles, the techniques for parasitic coupling evaluation and modeling, ...
    • Crossbar-based memristive logic-in-memory architecture 

      Papandroulikadis, Georgios; Vourkas, Ioannis; Abustelema, Angel; Sirakoulis, Georgios; Rubio Sola, Jose Antonio (2017-04-01)
      Article
      Accés obert
      The use of memristors and resistive random access memory (ReRAM) technology to perform logic computations, has drawn considerable attention from researchers in recent years. However, the topological aspects of the ...
    • Current characteristics of defective GNR nanoelectronic devices 

      Rallis, Konstantinos; Dimitrakis, Panagiotis; Sirakoulis, Georgios Ch.; Rubio Sola, Jose Antonio; Karafyllidis, Ioannis (2022)
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      The most promising Graphene structures for the development of nanoelectronics and sensor applications are Graphene nanoribbons (GNRs). GNRs with perfect lattices have been extensively investigated in the research literature; ...
    • Design and implementation of a 5/spl times/5 trits multiplier in a quasi-adiabatic ternary CMOS logic 

      Mateo Peña, Diego; Rubio Sola, Jose Antonio (1998-07)
      Article
      Accés obert
      Adiabatic switching is a technique to design low-power digital IC's. Fully adiabatic logics have expensive silicon area requirements. To solve this drawback, a quasi-adiabatic ternary logic is proposed. Its basis is ...
    • Design and implementation of an adaptive proactive reconfiguration technique in SRAM caches 

      Pouyan, Peyman; Amat Bertran, Esteve; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio (2013)
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      Accés restringit per política de l'editorial
      Scaling of device dimensions toward nano-scale regime has made it essential to innovate novel design techniques for improving the circuit robustness. This work proposes an implementation of adaptive proactive reconfiguration ...
    • Design and simulation of peripheral driving circuitry for computational ReRAM 

      Fernández López, Cristina; Vourkas, Ioannis; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 2022)
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      As an alternative approach to the von Neumann architecture, the notion of computational resistive random- access memory (ReRAM) has emerged, promising faster and more energy-efficient computing systems. In this context, ...
    • Design guidelines towards compact litho-friendly regular cells 

      Gómez Fernández, Sergio; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Elhoj, Martin; Schlinker, Guilherme; Woolaway, Nigel (2011)
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    • Design of complex circuits using the via-configurable transistor array regular layout fabric 

      Pons Solé, Marc; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Abella Ferrer, Jaume; Vera Rivera, Francisco Javier; González Colás, Antonio María (IEEE Computer Society Publications, 2011)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      Layout regularity will be mandatory for future CMOS technologies to mitigate manufacturability issues. However, existing CAD tools do not meet the needs imposed by regularity constraints. In this paper we present a new ...
    • Diseño de circuitos y sistemas integrados 

      Rubio Sola, Jose Antonio; Altet Sanahujes, Josep; Aragonès Cervera, Xavier; González Jiménez, José Luis; Mateo Peña, Diego; Moll Echeto, Francisco de Borja (Edicions UPC, 2000)
      Llibre
      Accés restringit a la comunitat UPC
      La tecnología de circuitos integrados, basada principalmente en la miniaturización de los circuitos -con el incremento de prestaciones y la fuerte reducción de costos consiguientes– ha evolucionado intensamente en los ...