Exploració per autor "Cortadella, Jordi"
Ara es mostren els items 109-128 de 192
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Jutge.org: characteristics and experiences
(2018-07)
Article
Accés obertJutge.org is an open educational online programming judge designed for students and instructors, featuring a repository of problems that is well organized by courses, topics and difficulty. Internally, Jutge.org uses a ... -
Keeping control transfer instructions out of the pipeline in architectures without condition codes
(1987-05)
Report de recerca
Accés obertThe execution of branch instructions involves a loss of performance in pipelined processors. In this paper we present a mechanism for executing this kind of instruction with a zero delay. This mechanism has been proposed ... -
Lazy transition systems and asynchronous circuits synthesis with relative timing assumptions
(2002-02)
Article
Accés obertThis paper presents a design flow for timed asynchronous circuits. It introduces lazy transitions systems as a new computational model to represent the timing information required for synthesis. The notion of laziness ... -
Lazy transition systems: application to timing optimization of asynchronous circuits
(Institute of Electrical and Electronics Engineers (IEEE), 1998)
Text en actes de congrés
Accés obertThe paper introduces Lazy Transitions Systems (LzTSs). The notion of laziness explicitly distinguishes between the enabling and the firing of an event in a transition system. LzTSs can be effectively used to model the ... -
Log-based simplification of process models
(Springer, 2015)
Text en actes de congrés
Accés obertThe visualization of models is essential for user-friendly human-machine interactions during Process Mining. A simple graphical representation contributes to give intuitive information about the behavior of a system. ... -
Logic decomposition of incompletely specified functions
(2001-06)
Report de recerca
Accés obertThe logic decomposition of incompletely specified functions (ISFs) is studied. A theoretical support based on ternary algebras is provided. This support aims at the logic decomposition of ISFs. A partial order is defined ... -
Logic decomposition of speed-independent circuits
(1999-02)
Article
Accés obertLogic decomposition is a well-known problem in logic synthesis, but it poses new challenges when targeted to speed-independent circuits. The decomposition of a gate into smaller gates must preserve not only the functional ... -
Logic design of asynchronous circuits
(Institute of Electrical and Electronics Engineers (IEEE), 2002)
Text en actes de congrés
Accés obertSummary form only given. This tutorial aims at motivating the audience to consider asynchronous circuits as a competitive alternative to solve some of the design problems inherent to submicron technologies. One of the main ... -
Measuring the tolerance of self-adaptive clocks to supply voltage noise
(2011)
Text en actes de congrés
Accés obertSimultaneous switching noise has become an important issue due to its signal integrity and timing implications. Therefore a lot of time and resources are spent during the PDN design to minimize the supply voltage variation. ... -
Metastability in better-than-worst-case designs
(Institute of Electrical and Electronics Engineers (IEEE), 2014)
Text en actes de congrés
Accés obertBetter-Than-Worst-Case-Designs use timing speculation to run with a cycle period faster than the one required for worst-case conditions. This speculation may produce timing violations and metastability that result in ... -
Methodology and tools for state encoding in asynchronous circuit synthesis
(Institute of Electrical and Electronics Engineers (IEEE), 1996)
Text en actes de congrés
Accés obertThis paper proposes a state encoding method for asynchronous circuits based on the theory of regions. A region in a Transition System is a set of states that “behave uniformly” with respect to a given transition (value ... -
Mining structured Petri nets for the visualization of process behavior
(Association for Computing Machinery (ACM), 2016)
Text en actes de congrés
Accés obertVisualization is essential for understanding the models obtained by process mining. Clear and efficient visual representations make the embedded information more accessible and analyzable. This work presents a novel approach ... -
Mix & Latch: An optimization flow for high-performance designs with single-clock mixed-polarity latches and flip-flops
(Institute of Electrical and Electronics Engineers (IEEE), 2023-04-10)
Article
Accés obertFlip-flops are the most used sequential elements in synchronous circuits, but designs based on latches can operate at higher frequencies and occupy less area. Techniques to increase the maximum operating frequency of ... -
Multi-level dataflow-driven macro placement guided by RTL structure and analytical methods
(2021-12)
Article
Accés obertWhen RTL designers define the hierarchy of a system, they exploit their knowledge about the conceptual abstractions devised during the design and the functional interactions between the logical components. This valuable ... -
Narrowing the margins with elastic clocks
(Institute of Electrical and Electronics Engineers (IEEE), 2010)
Text en actes de congrés
Accés obertThe continuous shrinking of process geometries increases variability and demands for conservative margins that have a negative impact on performance. With conventional clocks, the cycle period has to be defined to accommodate ... -
New region-based algorithms for deriving bounded Petri nets
(Institute of Electrical and Electronics Engineers (IEEE), 2010-03)
Article
Accés obertThe theory of regions was introduced in the early nineties as a method to bridge state and event-based models. This paper tackles the problem of deriving a Petri net from a state-based model, using the theory of regions. ... -
On the performance evaluation of multi-guarded marked graphs with single-server semantics
(2010-09)
Article
Accés obertIn discrete event systems, a given task can start executing when all the required input data are available. The required input data for a given task may change along the evolution of the system. A way of modeling this ... -
On the realization of reactive systems
(2001-05)
Report de recerca
Accés obertA new notion of realization of reactive systems is defined. Realization is defined as a relation between the states of two transition systems, the specification and the implementation, in which events are classified as ... -
Optimizing CMOS circuits for low power using transistor reordering
(Institute of Electrical and Electronics Engineers (IEEE), 1996)
Text en actes de congrés
Accés obertThis paper addresses the optimization of a circuit for low power using transistor reordering. The optimization algorithm relies on a stochastic model of a static CMOS gate that includes the power internal nodes of the gate. ... -
Partial order based approach to synthesis of speed-independent circuits
(Institute of Electrical and Electronics Engineers (IEEE), 1997)
Text en actes de congrés
Accés obertThis paper introduces a novel technique for synthesis of speed-independent circuits from their Signal Transition Graph specifications. The new method uses partial order in the form of the STG-unfolding segment to derive ...
