Exploració per autor "Cortadella, Jordi"
Ara es mostren els items 66-85 de 192
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Fast energy-optimal multi-kernel DNN-like application allocation on multi-FPGA platforms
Shan, Junnan; Lazarescu, Mihai T.; Cortadella, Jordi; Lavagno, Luciano; Casu, Mario R. (2022-04)
Article
Accés obertPlatforms with multiple Field Programmable Gate Arrays (FPGAs), such as Amazon Web Services (AWS) F1 instances, can efficiently accelerate multi-kernel pipelined applications, e.g., Convolutional Neural Networks for machine ... -
Flujo de diseño asíncrono con la biblioteca DCVSL_LIB para ES2 ECPD10
Sintes, L; Escudero Acuña, Javier; Peña Basurto, Marco Antonio; Roig Mansilla, Oriol; Cortadella, Jordi; Carrabina Bordoll, Jordi (Omron, 1996)
Text en actes de congrés
Accés obertEn el presente trabajo se pretende abordar la metodología a seguir durante el flujo de diseño de un circuito asíncrono orientado a prestaciones, utilizando la biblioteca DCVSL_LIB para aplicaciones asíncronas que hemos ... -
Formal verification of safety properties in timed circuits
Peña Basurto, Marco Antonio; Cortadella, Jordi; Kondratyev, Alex; Pastor Llorens, Enric (Institute of Electrical and Electronics Engineers (IEEE), 2000)
Text en actes de congrés
Accés obertThe incorporation of timing makes circuit verification computationally expensive. This paper proposes a new approach for the verification of timed circuits. Rather than calculating the exact timed stare space, a conservative ... -
From synchronous to asynchronous: an automatic approach
Cortadella, Jordi; Kondratyev, Alex; Lavagno, Luciano; Lwin, Kelvin; Sotiriou, Christos P. (Institute of Electrical and Electronics Engineers (IEEE), 2004)
Text en actes de congrés
Accés obertThis paper presents a methodology to derive asynchronous circuits from optimized synchronous circuits by replacing the clock distribution tree by a handshaking network. A case study shows the applicability of the method ... -
Generation of synchronizing state machines from a transition system: a region-based approach
Teren, Viktor; Cortadella, Jordi; Villa, Tiziano (2023-03)
Article
Accés obertTransition systems (TSs) and Petri nets (PNs) are important models of computation ubiquitous in formal methods for modeling systems. A crucial problem is how to extract, from a given TS, a PN whose reachability graph is ... -
Genet: a tool for the synthesis and mining of Petri nets
Carmona Vargas, Josep; Cortadella, Jordi; Kishinevsky, Michael (Institute of Electrical and Electronics Engineers (IEEE), 2009)
Text en actes de congrés
Accés obertState-based representations of concurrent systems suffer from the well known state explosion problem. In contrast, Petri nets are good models for this type of systems both in terms of complexity of the analysis and in ... -
Handshake protocols for de-synchronization
Blunno, Ivan; Cortadella, Jordi; Kondratyev, Alex; Lavagno, Luciano; Lwin, Kelvin; Sotiriou, Christos P. (Institute of Electrical and Electronics Engineers (IEEE), 2004)
Text en actes de congrés
Accés obertDe-synchronization appears as a new paradigm to automate the design of asynchronous circuits from synchronous netlists. This paper studies different protocols for de-synchronization and formally proves their correctness. ... -
Hardware and Petri nets: application to asynchronous circuit design
Cortadella, Jordi; Kishinevsky, Michael; Kondratyev, Alex; Lavagno, Luciano; Yakovlev, Alex (Springer, 2000-06)
Article
Accés obertAsynchronous circuits is a discipline in which the theory of concurrency is applied to hardware design. This paper presents an overview of a design framework in which Petri nets are used as the main behavioral model for ... -
Hardware primitives for the synthesis of multithreaded elastic systems
Dimitrakopoulos, George N.; Seitanidis, I.; Psarras, A.; Tsiouris, K.; Mattheakis, Pavlos M.; Cortadella, Jordi (European Interactive Digital Advertising Alliance (EDAA), 2014)
Text en actes de congrés
Accés obertElastic systems operate in a dataflow-like mode using a distributed scalable control and tolerating variable-latency computations. At the same time, multithreading increases the utilization of processing units and hides ... -
Hardware synthesis for asynchronous communications mechanisms
Costa Gorgônio, Kyller; Cortadella, Jordi (Institute of Electrical and Electronics Engineers (IEEE), 2008)
Text en actes de congrés
Accés obertAsynchronous data communication mechanisms (ACMs) have been extensively studied as data connectors between independently timed concurrent processes. In this work an automatic method for synthesis of re-reading ACMs is ... -
Hierarchical gate-level verification of speed-independent circuits
Roig Mansilla, Oriol; Cortadella, Jordi; Pastor Llorens, Enric (Institute of Electrical and Electronics Engineers (IEEE), 1995)
Text en actes de congrés
Accés obertThis paper presents a method for the verification of speed-independent circuits. The main contribution is the reduction of the circuit to a set of complex gates that makes the verification time complexity depend only on ... -
High-level synthesis of asynchronous systems: Scheduling and process synchronization
Badia Sala, Rosa Maria; Cortadella, Jordi (Institute of Electrical and Electronics Engineers (IEEE), 1993)
Text en actes de congrés
Accés obertBasic concepts for scheduling algorithms and control synthesis in high-level synthesis of asynchronous circuits are defined. Two scheduling strategies are presented and evaluated. Experiments on different benchmarks show ... -
High-level synthesis techniques for reducing the activity of functional units
Musoll Cinca, Enric; Cortadella, Jordi (Association for Computing Machinery (ACM), 1995)
Text en actes de congrés
Accés obertDecisions taken at the earliest steps of the design process may have a significant impact on the characteristics of the final implementation. This paper illustrates how power consumption issues can be tackled during ... -
High-radix division and square-root with speculation
Cortadella, Jordi; Lang Korpel, Thomas (Institute of Electrical and Electronics Engineers (IEEE), 1994-08)
Article
Accés obertThe speed of high-radix digit-recurrence dividers and square-root units is mainly determined by the complexity of the result-digit selection. We present a scheme in which a simpler function speculates the result digit, ... -
Identifying state coding conflicts in asynchronous system specifications using Petri net unfoldings
Kondratyev, Alex; Cortadella, Jordi; Kishinevsky, Michael; Lavagno, Luciano; Taubin, Alexander; Yakovlev, Alex (Institute of Electrical and Electronics Engineers (IEEE), 1998)
Text en actes de congrés
Accés obertState coding conflict detection is a fundamental part of synthesis of asynchronous concurrent systems from their specifications as signal transition graphs (STGs), which are a special kind of labelled Petri nets. The paper ... -
Increasing the robustness of digital circuits with ring oscillator clocks
Machado, Lucas; Roca Pérez, Antoni; Cortadella, Jordi (2017)
Text en actes de congrés
Accés obertTechnology scaling enables lower supply voltages, but also increases power density of integrated circuits. In this context, power integrity becomes a major concern in the implementation of highperformance designs. This ... -
Individual flip-flops with gated clocks for low power datapaths
Lang, Tomás; Cortadella, Jordi; Musoll Cinca, Enric (Institute of Electrical and Electronics Engineers (IEEE), 1997-06)
Article
Accés obertEnergy consumption has become one of the important factors in digital systems, because of the requirement to dissipate this energy in high-density circuits and to extend the battery life in portable systems such as devices ... -
INFORMÀTICA
Cortadella, Jordi (Universitat Politècnica de Catalunya, 2017-01-09)
Examen
Accés restringit a la comunitat UPC -
INFORMÀTICA
Cortadella, Jordi (Universitat Politècnica de Catalunya, 2017-01-09)
Examen
Accés restringit a la comunitat UPC -
INFORMÀTICA
Cortadella, Jordi (Universitat Politècnica de Catalunya, 2019-01-14)
Examen
Accés restringit a la comunitat UPC