Ara es mostren els items 29-35 de 35

    • Simulating next-generation Cyber-physical computing platforms 

      Burgio, Paolo; Álvarez Martínez, Carlos; Ayguadé Parra, Eduard; Filgueras Izquierdo, Antonio; Jiménez González, Daniel; Martorell Bofill, Xavier; Navarro, Nacho; Giorgi, Roberto (2015)
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      In specific domains, such as cyber-physical systems, platforms are quickly evolving to include multiple (many-) cores and programmable logic in a single system-on-chip, while includ- ing interfaces to commodity ...
    • Software-managed power reduction in Infiniband links 

      Dickov, Branimir; Pericas, Miquel; Carpenter, Paul Matthew; Navarro, Nacho; Ayguadé Parra, Eduard (Institute of Electrical and Electronics Engineers (IEEE), 2014)
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      The backbone of a large-scale supercomputer is the interconnection network. As compute nodes become more energy-efficient, the interconnect is accounting for an increasing proportion of the total system energy consumption. ...
    • The AXIOM project (Agile, eXtensible, fast I/O Module) 

      Theodoropoulos, Dimitris; Pnevmatikatos, Dionisis; Alvarez, Carlos; Ayguadé Parra, Eduard; Bueno, Javier; Filgueras Izquierdo, Antonio; Jiménez-González, Daniel; Martorell Bofill, Xavier; Navarro, Nacho; Segura, Carlos; Fernandez, Carles; Oro, David; Rodriguez Saeta, Javier; Gai, Paolo; Rizzo, Antonio; Giorgi, Roberto (Institute of Electrical and Electronics Engineers (IEEE), 2015)
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      The AXIOM project (Agile, eXtensible, fast I/O Module) aims at researching new software/hardware architectures for the future Cyber-Physical Systems (CPSs). These systems are expected to react in real-time, provide enough ...
    • The AXIOM software layers 

      Álvarez, Carlos; Ayguadé Parra, Eduard; Bosch Pons, Jaume; Bueno Hedo, Javier; Cherkashin, Artem; Filgueras Izquierdo, Antonio; Jiménez González, Daniel; Martorell Bofill, Xavier; Navarro, Nacho; Vidal, Miquel; Theodoropoulos, Dimitris; Pnevmatikatos, Dionisis; Catani, Davide; Oro Garcia, David; Fernandez Prades, Carles; Segura, Carlos; Rodriguez Saeta, Javier; Hernando Pericás, Francisco Javier; Scordino, Claudio; Gai, Paolo; Passera, Pierluigi; Pomella, Alberto; Bettin, Nicola; Rizzo, Antonio; Giorgi, Roberto (2016-11-01)
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      AXIOM project aims at developing a heterogeneous computing board (SMP-FPGA).The Software Layers developed at the AXIOM project are explained.OmpSs provides an easy way to execute heterogeneous codes in multiple cores. ...
    • The AXIOM software layers 

      Alvarez, Carlos; Ayguadé Parra, Eduard; Bueno Hedo, Javier; Filgueras Izquierdo, Antonio; Jiménez González, Daniel; Martorell Bofill, Xavier; Navarro, Nacho; Theodoropoulos, Dimitris; Pnevmatikatos, Dionisis; Scordino, Claudio; Gai, Paolo; Catani, Davide; Segura, Carlos (Institute of Electrical and Electronics Engineers (IEEE), 2015)
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      People and objects will soon share the same digital network for information exchange in a world named as the age of the cyber-physical systems. The general expectation is that people and systems will interact in real-time. ...
    • The TERAFLUX Project: Exploiting the dataflow paradigm in next generation teradevices 

      Solinas, Marco; Badia Sala, Rosa Maria; Bodin, François; Cohen, Albert; Evripidou, Paraskevas; Faraboschi, Paolo; Fechner, Bernhard; Gao, Guang R.; Garbade, Arne; Girbal, Sylvain; Goodman, Daniel; Khan, Behran; Koliai, Souad; Li, Feng; Lujan, Mikel; Morin, Laurent; Mendelson, Avi; Navarro, Nacho; Pop, Antoniu; Trancoso, Pedro; Ungerer, Theo; Valero Cortés, Mateo; Weis, Sebastian; Watson, Ian; Zuckermann, Stéphane; Giorgi, Roberto (IEEE Computational Intelligence Society, 2013)
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      Thanks to the improvements in semiconductor technologies, extreme-scale systems such as teradevices (i.e., composed by 1000 billion of transistors) will enable systems with 1000+ general purpose cores per chip, probably ...
    • Thread fork/join techniques for multi-level parallelism exploitation in NUMA multiprocessors 

      Martorell Bofill, Xavier; Ayguadé Parra, Eduard; Navarro, Nacho; Corbalán González, Julita; González Tallada, Marc; Labarta Mancho, Jesús José (Association for Computing Machinery (ACM), 1999)
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      This paper presents some techniques for efficient thread forking and joining in parallel execution environments, taking into consideration the physical structure of NUMA machines and the support for multi-level parallelization ...