Exploració per autor "Cazorla, Francisco J."
Ara es mostren els items 1-20 de 34
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Accurate ILP-Based Contention Modeling on Statically Scheduled Multicore Systems
Palomo, Xavier; Mezzetti, Enrico; Abella Ferrer, Jaume; Bril, Reinder J.; Cazorla, Francisco J. (IEEE, 2019-06-24)
Comunicació de congrés
Accés obertCommercially available Off The Shelf (COTS) multicores have been assessed as the baseline computing platform even in the most conservative real-time domains. Multicore contention arising on shared hardware resources, with ... -
Adapting TDMA arbitration for measurement-based probabilistic timing analysis
Panic, Milos; Abella Ferrer, Jaume; Quiñones, Eduardo; Hernandez, Carles; Ungerer, Theo; Cazorla, Francisco J. (Elsevier, 2017-07)
Article
Accés obertCritical Real-Time Embedded Systems require functional and timing validation to prove that they will perform their functionalities correctly and in time. For timing validation, a bound to the Worst-Case Execution Time ... -
Aging Assessment and Design Enhancement of Randomized Cache Memories
Trilla, David; Hernandez, Carles; Abella Ferrer, Jaume; Cazorla, Francisco J. (Institute of Electrical and Electronics Engineers (IEEE), 2017-01-17)
Article
Accés obertCritical real-time systems require the estimation of the worst-case execution time (WCET) for scheduling purposes and resource budgeting. Measurement-based probabilistic timing analysis (MBPTA) has been shown recently as ... -
Assessing the Adherence of an Industrial Autonomous Driving Framework to ISO 26262 Software Guidelines
Tabani, Hamid; Kosmidis, Leonidas; Abella Ferrer, Jaume; Cazorla, Francisco J.; Bernat, Guillem (Association for Computing Machinery (ACM), 2019-06-06)
Comunicació de congrés
Accés obertThe complexity and size of Autonomous Driving (AD) software are comparably higher than that of software implementing other (standard) functionalities in the car. To make things worse, a big fraction of AD software is not ... -
AURIX TC277 Multicore Contention Model Integration for Automotive Applications
Mezzetti, Enrico; Barbina, Luca; Abella Ferrer, Jaume; Botta, Stefania; Cazorla, Francisco J. (IEEE, 2019-05-16)
Comunicació de congrés
Accés obertThe ability to produce early guaranteed performance (worst-case execution time) estimates for multicores, i.e. before software from different providers gets integrated onto the same critical system, is pivotal. This helps ... -
Boosting Guaranteed Performance in Wormhole NoCs with Probabilistic Timing Analysis
Slijepcevic, Mladen; Hernandez, Carles; Abella Ferrer, Jaume; Cazorla, Francisco J. (IEEE, 2017-09-28)
Comunicació de congrés
Accés obertWormhole-based NoCs (wNoCs) are widely accepted in high-performance domains as the most appropriate solution to interconnect an increasing number of cores in the chip. However, wNoCs suitability in the context of critical ... -
Computing Safe Contention Bounds for Multicore Resources with Round-Robin and FIFO Arbitration
Fernandez, Gabriel; Jalle, Javier; Abella Ferrer, Jaume; Quiñones, Eduardo; Vardanega, Tullio; Cazorla, Francisco J. (Institute of Electrical and Electronics Engineers (IEEE), 2016-10-11)
Article
Accés obertNumerous researchers have studied the contention that arises among tasks running in parallel on a multicore processor. Most of those studies seek to derive a tight and sound upper-bound for the worst-case delay with which ... -
Design and implementation of a fair credit-based bandwidth sharing scheme for buses
Slijepcevic, Mladen; Hernandez, Carles; Abella Ferrer, Jaume; Cazorla, Francisco J. (Institute of Electrical and Electronics Engineers (IEEE), 2017-05-15)
Comunicació de congrés
Accés obertFair arbitration in the access to hardware shared resources is fundamental to obtain low worst-case execution time (WCET) estimates in the context of critical real-time systems, for which performance guarantees are essential. ... -
Dynamic software randomisation: Lessons learnec from an aerospace case study
Cros, Fabrice; Kosmidis, Leonidas; Wartel, Franck; Morales, David; Abella Ferrer, Jaume; Broster, Ian; Cazorla, Francisco J. (2017-05-15)
Comunicació de congrés
Accés obertTiming Validation and Verification (V&V) is an important step in real-time system design, in which a system's timing behaviour is assessed via Worst Case Execution Time (WCET) estimation and scheduling analysis. For WCET ... -
ePAPI: Performance Application ProgrammingInterface for Embedded Platforms
Giesen, Jeremy; Mezzetti, Enrico; Abella Ferrer, Jaume; Fernández, Enrique; Cazorla, Francisco J. (2019)
Comunicació de congrés
Accés obertPerformance Monitoring Counters (PMCs) have been traditionally used in the mainstream computing domain to perform debugging and optimization of software performance. PMCs are increasingly considered in embedded time-critical ... -
EPC Enacted: Integration in an Industrial Toolbox and Use against a Railway Application
Mezzetti, Enrico; Fernandez, Mikel; Bardizbanyan, Alen; Agirre, Irune; Abella Ferrer, Jaume; Vardanega, Tullio; Cazorla, Francisco J. (Institute of Electrical and Electronics Engineers (IEEE), 2017-06-08)
Comunicació de congrés
Accés obertMeasurement-based timing analysis approaches are increasingly making their way into several industrial domains on account of their good cost-benefit ratio. The trustworthiness of those methods, however, suffers from the ... -
EPC: Extended Path Coverage for Measurement-Based Probabilistic Timing Analysis
Ziccardi, Marco; Mezzetti, Enrico; Vardanega, Tullio; Abella Ferrer, Jaume; Cazorla, Francisco J. (IEEE, 2016-01-18)
Comunicació de congrés
Accés obertMeasurement-based probabilistic timing analysis (MBPTA) computes trustworthy upper bounds to the execution time of software programs. MBPTA has the connotation, typical of measurement-based techniques, that the bounds ... -
Execution time distributions in embedded safety-critical systems using extreme value theory
del Castillo, Joan; Padilla, Maria; Abella Ferrer, Jaume; Cazorla, Francisco J. (Inderscience, 2017)
Article
Accés obertSeveral techniques have been proposed to upper-bound the worst-case execution time behaviour of programs in the domain of critical real-time embedded systems. These computing systems have strong requirements regarding the ... -
Fitting Software Execution-Time Exceedance into a Residual Random Fault in ISO-26262
Agirre, Irune; Cazorla, Francisco J.; Abella Ferrer, Jaume; Hernandez, Carles; Mezzetti, Enrico; Azkarate-askasua, Mikel; Vardanega, Tullio (IEEE, 2018-09-01)
Accés obertCar manufacturers relentlessly replace or augment the functionality of mechanical subsystems with electronic components. Most such subsystems (e.g., steer-by-wire) are safety related, hence, subject to regulation. ISO-26262, ... -
Generating and Exploiting Deep Learning Variants to Increase Heterogeneous Resource Utilization in the NVIDIA Xavier
Pujol, Roger; Tabani, Hamid; Kosmidis, Leonidas; Mezzetti, Enrico; Abella Ferrer, Jaume; Cazorla, Francisco J. (2019)
Comunicació de congrés
Accés obertDeep learning-based solutions and, in particular, deep neural networks (DNNs) are at the heart of several functionalities in critical-real time embedded systems (CRTES) from vision-based perception (object detection and ... -
High-Integrity Performance Monitoring Units in Automotive Chips for Reliable Timing V&V
Mezzetti, Enrico; Kosmidis, Leonidas; Abella Ferrer, Jaume; Cazorla, Francisco J. (IEEE, 2018-01-16)
Article
Accés obertAs software continues to control more system-critical functions in cars, its timing is becoming an integral element in functional safety. Timing validation and verification (V&V) assesses softwares end-to-end timing ... -
Increasing the Reliability of Software Timing Analysis for Cache-Based Processors
Milutinovic, Suzana; Mezzetti, Enrico; Abella Ferrer, Jaume; Cazorla, Francisco J. (IEEE, 2019-06-01)
Article
Accés obertReal-time systems are witnessing a significant increase in critical software's size, complexity, and performance needs, which can only be satisfied with high-performance hardware features. Cache memories, pervasively used ... -
Industrial experiences with resource management under software randomization in ARINC653 avionics environments
Kosmidis, Leonidas; Maxim, Cristian; Jegu, Victor; Vatrinet, Francis; Cazorla, Francisco J. (Association for Computing Machinery (ACM), 2018-11-05)
Comunicació de congrés
Accés obertInjecting randomization in different layers of the computing platform has been shown beneficial for security, resilience to software bugs and timing analysis. In this paper, with focus on the latter, we show our experience ... -
Maximum-Contention Control Unit (MCCU): Resource Access Count and Contention Time Enforcement
Cardona, Jordi; Hernandez, Carles; Abella Ferrer, Jaume; Cazorla, Francisco J. (IEEE, 2019-04-16)
Comunicació de congrés
Accés obertIn real-time systems, the techniques to derive bounds to the contention tasks can suffer in multicore build on resource quota monitoring and enforcement. Existing techniques track and bound the number of requests to hardware ... -
MC2: Multicore and Cache Analysis via Deterministic and Probabilistic Jitter Bounding
Díaz, Enrique; Fernández, Mikel; Kosmidis, Leonidas; Mezzetti, Enrico; Hernandez, Carles; Abella Ferrer, Jaume; Cazorla, Francisco J. (Springer International Publishing, 2017-05-30)
Comunicació de congrés
Accés obertIn critical domains, reliable software execution is increasingly involving aspects related to the timing dimension. This is due to the advent of high-performance (complex) hardware, used to provide the rising levels of ...