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Llistant per Autor Aymerich Capdevila, Nivard

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Mostrant resultats 1 a 12 de 12
Vista preliminarDataTítolAutor(s)
2011Adaptive fault-tolerant architecture for unreliable device technologiesAymerich Capdevila, Nivard; Cotofana, Sorin; Rubio Sola, Jose Antonio
jul-2012Adaptive fault-tolerant architecture for unreliable technologies with heterogeneous variabilityAymerich Capdevila, Nivard; Cotofana, Sorin; Rubio Sola, Jose Antonio
nov-2013Controlled degradation stochastic resonance in adaptive averaging cell-based architecturesAymerich Capdevila, Nivard; Cotofana, Sorin; Rubio Sola, Jose Antonio
2013Extending the fundamental error bounds for asymmetric error reliable computationAymerich Capdevila, Nivard; Rubio Sola, Jose Antonio
Fault_Tolerance.pdf.jpg2010Fault-tolerant nanoscale architecture based on linear threshold gates with redundancyAymerich Capdevila, Nivard; Rubio Sola, Jose Antonio
jul-2012Fault-tolerant nanoscale architecture based on linear threshold gates with redundancyAymerich Capdevila, Nivard; Rubio Sola, Jose Antonio
20-nov-2013Impact of finfet and III-V/Ge technology on logic and memory cell behaviorAmat Bertran, Esteve; Calomarde Palomino, Antonio; García Almudéver, Carmen; Aymerich Capdevila, Nivard; Canal Corretger, Ramon; Rubio Sola, Jose Antonio
2011Impact of positive bias temperature instability (PBTI)Aymerich Capdevila, Nivard; Ganapathy, Shrikanth; Rubio Sola, Jose Antonio; Canal Corretger, Ramon; González Colás, Antonio María
EAB_DCIS12.pdf.jpg2012Mitigation strategies of the variability in 3T1D cell memories scaled beyond 22nmAmat Bertran, Esteve; García Almudéver, Carmen; Aymerich Capdevila, Nivard; Canal Corretger, Ramon; Rubio Sola, Jose Antonio
2-abr-2014Reliability and performance tunable architecture: the partially asynchronous R-Fold modular redundancy (pA-RMR)Aymerich Capdevila, Nivard; Rubio Sola, Jose Antonio
2013Study on the optimal distribution of redundancy effort in cross-layer reliable architecturesAymerich Capdevila, Nivard; Rubio Sola, Jose Antonio
systematic.pdf.jpgset-2013Systematic and random variability analysis of two different 6T-SRAM layout topologiesAmat Bertran, Esteve; Amatlle, E.; Gómez González, Sergio; Aymerich Capdevila, Nivard; García Almudéver, Carmen; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio
Mostrant resultats 1 a 12 de 12

 

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