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Llistant per Autor Rubio Sola, Jose Antonio

Vista preliminar	Data	Títol	Autor(s)
	2011	A comparative variability analysis for CMOS and CNFET 6T SRAM cells	García Almudéver, Carmen; Rubio Sola, Jose Antonio
	2010	A comprehensive compensation technique for process variations and environmental fluctuations in digital integrated circuits	Andrade Miceli, Dennis Michael; Calomarde Palomino, Antonio; Rubio Sola, Jose Antonio
	2011	Adaptive fault-tolerant architecture for unreliable device technologies	Aymerich Capdevila, Nivard; Cotofana, Sorin; Rubio Sola, Jose Antonio
	jul-2012	Adaptive fault-tolerant architecture for unreliable technologies with heterogeneous variability	Aymerich Capdevila, Nivard; Cotofana, Sorin; Rubio Sola, Jose Antonio
	2011	Analysis of delay mismatching of digital circuits caused by common environmental fluctuations	Andrade Miceli, Dennis Michael; Calomarde Palomino, Antonio; Rubio Sola, Jose Antonio; Cotofana, Sorin
	2011	A new probabilistic design methodology of nanoscale digital circuits	García Leyva, Lancelot; Calomarde Palomino, Antonio; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio
	2012	A novel variation-tolerant 4T-DRAM cell with enhanced soft-error tolerance	Ganapathy, Shrikanth; Canal Corretger, Ramon; Alexandrescu, Dan; Costenaro, Enrico; González Colás, Antonio María; Rubio Sola, Jose Antonio
	2012	A Novel variation-tolerant 4T-DRAM with enhance soft-error tolerance	Ganapathy, Shrikanth; Canal Corretger, Ramon; Alexandrescu, Dan; Costenaro, Enrico; González Colás, Antonio María; Rubio Sola, Jose Antonio
	2011	Carbon nanotube growth process-related variablity in CNFET's	García Almudéver, Carmen; Rubio Sola, Jose Antonio
	2011	Design guidelines towards compact litho-friendly regular cells	Gómez Fernández, Sergio; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Elhoj, Martin; Schlinker, Guilherme; Woolaway, Nigel
	2011	Design of complex circuits using the via-configurable transistor array regular layout fabric	Pons Solé, Marc; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Abella Ferrer, Jaume; Vera Rivera, Francisco Javier; González Colás, Antonio María
	15-abr-2011	Dynamic fine-grain body biasing of caches with latency and leakage 3T1D-based monitors	Ganapathy, Shrikanth; Canal Corretger, Ramon; González Colás, Antonio María; Rubio Sola, Jose Antonio
	2007	Error probability in synchronous digital circuits due to power supply noise	Martorell Cid, Ferran; Pons, M; Rubio Sola, Jose Antonio; Moll Echeto, Francisco de Borja
	2011	Fast time-to-market with via-configurable transistor array regular fabric: A delay-locked loop design case study	González Colás, Antonio María; Pons Solé, Marc; Barajas Ojeda, Enrique; Mateo Peña, Diego; López González, Juan Miguel; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Abella Ferrer, Jaume; Vera Rivera, Francisco Javier
	2010	Fault-tolerant nanoscale architecture based on linear threshold gates with redundancy	Aymerich Capdevila, Nivard; Rubio Sola, Jose Antonio
	jul-2012	Fault-tolerant nanoscale architecture based on linear threshold gates with redundancy	Aymerich Capdevila, Nivard; Rubio Sola, Jose Antonio
	9-jun-2009	FOCSI: A new layout regularity metric	Pons Solé, Marc; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Abella Ferrer, Jaume; Vera Rivera, Francisco Javier; González Colás, Antonio María
	set-2002	Four different approaches for the measurement of IC surface temperature: Application to thermal testing	Saulnier, J B; Altet Sanahujes, Josep; Dilhaire, S; Volz, S; Rampnoux, J M; Rubio Sola, Jose Antonio; Grauby, S; Patino, L; Claeys, W
	2011	Impact of positive bias temperature instability (PBTI)	Aymerich Capdevila, Nivard; Ganapathy, Shrikanth; Rubio Sola, Jose Antonio; Canal Corretger, Ramon; González Colás, Antonio María
	2011	Manufacturing variability analysis in carbon nanotube technology: a comparison with bulk CMOS in 6T SRAM scenario	García Almudéver, Carmen; Rubio Sola, Jose Antonio