Exploració per tema "DFM"
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Lithography aware regular cell design based on a predictive technology model
(2010-12)
Article
Accés restringit per política de l'editorialAs semiconductor technology advances into the nanoscale era, optical effects such as channel narrowing, corner rounding or line-end pullback are critical to accomplish circuit yield specifications. It is well-demonstrated ... -
Via-configurable transistors array: a regular design technique to improve ICs yield
(Institute of Electrical and Electronics Engineers (IEEE), 2007)
Text en actes de congrés
Accés obertProcess variations are a major bottleneck for digital CMOS integrated circuits manufacturability and yield. That is why regular techniques with different degrees of regularity are emerging as possible solutions. Our ...