Exploració per tema "Circuit testing"
Ara es mostren els items 1-8 de 8
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A digital memristor emulator for FPGA-based artificial neural networks
(Institute of Electrical and Electronics Engineers (IEEE), 2016)
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Accés restringit per política de l'editorialFPGAs are reconfigurable electronic platforms, well-suited to implement complex artificial neural networks (ANNs). To this end, the compact hardware (HW) implementation of artificial synapses is an important step to obtain ... -
An approach to dynamic power consumption current testing of CMOS ICs
(Institute of Electrical and Electronics Engineers (IEEE), 1995)
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Accés obertI/sub DDQ/ testing is a powerful strategy for detecting defects that do not alter the logic behavior of CMOS ICs. Such a technique is very effective especially in the detection of bridging defects although some opens can ... -
Analysis of ISSQ/IDDQ testing implementation and circuit partitioning in CMOS cell-based design
(Institute of Electrical and Electronics Engineers (IEEE), 1996)
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Accés obertDifference between ISSQ and IDDQ testing strategies is presented, discussing the dependency of area overhead and sensing speed on the technology. The current sensor implementation style suitable for cell-based design ... -
Automatic generation of synchronous test patterns for asynchronous circuits
(Institute of Electrical and Electronics Engineers (IEEE), 1997)
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Accés obertThis paper presents a novel approach for automatic test pattern generation of asynchronous circuits. The techniques used for this purpose assume that the circuit can only be exercised by applying synchronous test vectors, ... -
CAD directions for high performance asynchronous circuits
(Association for Computing Machinery (ACM), 1999)
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Accés obertThis paper describes a novel methodology for high performance asynchronous design based on timed circuits and on CAD support for their synthesis using relative timing. This methodology was developed for a prototype iA32 ... -
Frequency characterization of a 2.4 GHz CMOS LNA by Thermal Measurements
(Institute of Electrical and Electronics Engineers (IEEE), 2006)
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Accés obertThis paper presents a technique to obtain electrical characteristics of analog and RF circuits, based on measuring temperature at the silicon surface close to the circuit under test. Experimental results validate the ... -
Review of temperature sensors as monitors for RFMMW built-in testing and self-calibration schemes
(Institute of Electrical and Electronics Engineers (IEEE), 2014)
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Accés restringit per política de l'editorialThis paper presents an overview of the work done so far related to the use of temperature sensors as performance monitors for RF and MMW circuits with the goal to implement built-in testing or self-calibration techniques. ... -
VCO phase noise and sideband spurs due to substrate noise generated by on-chip digital circuits
(Institute of Electrical and Electronics Engineers (IEEE), 2006)
Text en actes de congrés
Accés obertThis paper presents the effects of noise generated by realistic digital circuits on RF voltage controlled oscillators (VCO) integrated in the same silicon die. The digital noise is coupled through the common substrate and ...