Exploració per tema "BTI"

Ara es mostren els items 1-4 de 4

    • Aging Assessment and Design Enhancement of Randomized Cache Memories 

      Trilla, David; Hernandez, Carles; Abella Ferrer, Jaume; Cazorla, Francisco J. (Institute of Electrical and Electronics Engineers (IEEE), 2017-01-17)
      Article
      Accés obert
      Critical real-time systems require the estimation of the worst-case execution time (WCET) for scheduling purposes and resource budgeting. Measurement-based probabilistic timing analysis (MBPTA) has been shown recently as ...

    • CMOS inverter performance degradation and its correlation with BTI, HCI and OFF state MOSFETs aging 

      Crespo Yepes, Albert; Nasarre Campo, Carles; Garsot Borras, Norbert; Martin Martínez, Javier; Rodríguez Martínez, Rosana; Barajas Ojeda, Enrique; Aragonès Cervera, Xavier; Mateo Peña, Diego; Nafría Maqueda, Montserrat (2022-05-01)
      Article
      Accés restringit per política de l'editorial
      In this work, CMOS inverters are subjected to electrical stress emulating a complete operation cycle and the shifts in the performance parameters (i.e., peak current and inversion voltage) evaluated. Moreover, degradation ...

    • Impact of adaptive proactive reconfiguration technique on Vmin and lifetime of SRAM caches 

      Pouyan, Peyman; Amat Bertran, Esteve; Barajas Ojeda, Enrique; Rubio Sola, Jose Antonio (2014)
      Text en actes de congrés
      Accés obert
      This work presents a test and measurement technique to monitor aging and process variation status of SRAM cells as an aging-aware design technique. We have then verified our technique with an implemented chip. The obtained ...

    • POS1 - Prediction of Thermally Accelerated Aging Process at 28nm 

      Chanawala, Parvez Anwar; Hill, Ian; Sheikholeslam, S. Arash; Ivanov, André (2022-05)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      We introduce a methodology to predict degradation in an SoC device undergoing a thermally accelerated aging process. SoCs are usually stressed at high temperatures and voltages (above nominal) to accelerate their aging ...