• Effective instruction scheduling techniques for an interleaved cache clustered VLIW processor 

      Gibert Codina, Enric; Sánchez Navarro, Jesús; González Colás, Antonio María (Institute of Electrical and Electronics Engineers (IEEE), 2002)
      Text en actes de congrés
      Accés obert
      Clustering is a common technique to overcome the wire delay problem incurred by the evolution of technology. Fully-distributed architectures, where the register file, the functional units and the data cache are partitioned, ...
    • Extreme-ultraviolet coherent pulse amplification in argon 

      Serrat Jurado, Carles; Seres, Jozsef; Seres, Enikoe; Namba, Shinichi (2019-06-25)
      Article
      Accés obert
      The amplification of ultrashort extreme-ultraviolet (XUV) pulses in argon in high-order harmonic generation processes is studied by using the time-dependent Schrödinger equation in the spin-free one-active-electron and ...
    • Software prefetching for software pipelined loops 

      Sánchez, Jesús; González Colás, Antonio María (Institute of Electrical and Electronics Engineers (IEEE), 1998)
      Text en actes de congrés
      Accés obert
      The paper investigates the interaction between software pipelining and different software prefetching techniques for VLIW machines. It is shown that processor stalls due to memory dependencies have a great impact into ...