Exploració per tema "Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats"
Ara es mostren els items 1-20 de 277
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3D-printed UHF-RFID tag for embedded applications
(Institute of Electrical and Electronics Engineers (IEEE), 2020-08-10)
Article
Accés obertThis paper presents the design, manufacture and characterization of a novel 3D passive UHF-RFID tag for embedded applications. The prototype is fabricated using additive manufacturing techniques: 3D printing and copper ... -
A 2.4 GHz CMOS class-F power amplifier with reconfigurable load-impedance matching
(2019)
Article
Accés obert -
A case for acoustic wave detectors for soft-errors
(2016-01-01)
Article
Accés restringit per política de l'editorialThe continuing decrease in dimensions and operating voltage of transistors has increased their sensitivity against radiation phenomena, making soft errors an important challenge in future microprocessors. New techniques ... -
A case study for the verification of complex timed circuits: IPCMOS
(Institute of Electrical and Electronics Engineers (IEEE), 2002)
Text en actes de congrés
Accés obertThe verification of a n-stage pulse-driven IPCMOS pipeline, for any n>0, is presented. The complexity of the system is 32n transistors and delay information is provided at the level of transistor The correctness of the ... -
A circuit-level SPICE modeling strategy for the simulation of behavioral variability in ReRAM
(Institute of Electrical and Electronics Engineers (IEEE), 2022)
Text en actes de congrés
Accés obertThe intrinsic behavioral variability in resistive switching devices (also known as 'memristors' or 'ReRAM devices') can be a reliability limiting factor or an opportunity for applications where randomness of resistance ... -
A compact switched-capacitor multi-bit quantizer for low-power high-resolution delta-sigma ADCs
(Institute of Electrical and Electronics Engineers (IEEE), 2018)
Comunicació de congrés
Accés restringit per política de l'editorialThis paper proposes a compact switched-capacitor (SC) multi-bit flash quantizer for low-power high-resolution delta-sigma modulators (¿SMs). First, a general power model for single-loop ¿SMs is presented to show the ... -
A comparative variability analysis for CMOS and CNFET 6T SRAM cells
(2011)
Text en actes de congrés
Accés restringit per política de l'editorialStatistical device variability may be a limiting factor for further miniaturizing nodes in silicon bulk CMOS technology. On the other hand, in novel technologies such as Carbon Nanotubes Field Effect Transistors (CNFETs), ... -
A crosstalk latch circuit design
(Institute of Electrical and Electronics Engineers (IEEE), 1990)
Text en actes de congrés
Accés restringit per política de l'editorialA D-latch sequential circuit design is presented that exhibits an elevated degree of tolerance to common and differential mode noise in the clock lines. The circuit tolerates noise voltages in the clock signals in the range ... -
A detailed methodology to compute soft error rates in advanced technologies
(Institute of Electrical and Electronics Engineers (IEEE), 2016)
Text en actes de congrés
Accés restringit per política de l'editorialSystem reliability has become a key design aspect for computer systems due to the aggressive technology miniaturization. Errors are typically dominated by transient faults due to radiation and are strongly related to the ... -
A general model for performance optimization of sequential systems
(Institute of Electrical and Electronics Engineers (IEEE), 2007)
Text en actes de congrés
Accés obertRetiming, c-slow retiming and recycling are different transformations for the performance optimization of sequential circuits. For retiming and c-slow retiming, different models that provide exact solutions have already ... -
A highly-accurate low-power CMOS potentiostat for implantable biosensors
(IEEE, 2011)
Text en actes de congrés
Accés restringit per política de l'editorialCurrent-mirror-based potentiostats suffer from systematic and random errors causing offset, gain and linearity error in reading out the sensor data. In this work, a new potentiostat topology is proposed to eliminate the ... -
A multi-radix approach to asynchronous division
(Institute of Electrical and Electronics Engineers (IEEE), 2001)
Text en actes de congrés
Accés obertThe speed of high-radix digit-recurrence dividers is mainly determined by the hardware complexity of the quotient-digit selection function. In this paper we present a scheme that combines the area efficiency of bundled ... -
A multi-synchronous bi-directional NoC (MBiNoC) architecture with dynamic self-reconfigurable channel for the GALS infrastructure
(Elsevier, 2017-03-16)
Article
Accés obertAbstract To enhance the performance of on-chip communications of Globally Asynchronous Locally Synchronous Systems (GALS), a dynamic reconfigurable multi-synchronous router architecture is proposed to increase network on ... -
A new look at the conditions for the synthesis of speed-independent circuits
(Institute of Electrical and Electronics Engineers (IEEE), 1995)
Text en actes de congrés
Accés obertThis paper presents a set of sufficient conditions for the gate-level synthesis of speed-independent circuits when constrained to a given class of gate library. Existing synthesis methodologies are restricted to architectures ... -
A novel general-purpose theorem for the analysis of linear circuits
(Institute of Electrical and Electronics Engineers (IEEE), 2021-01-01)
Article
Accés obertA novel general-purpose theorem for the analysis of linear circuits is stated and proven in this brief. When applying the proposed theorem, any current (voltage) of interest is determined by finding first an equivalent ... -
A pragmatic gaze on stochastic resonance based variability tolerant memristance
(Institute of Electrical and Electronics Engineers (IEEE), 2019)
Text en actes de congrés
Accés obertStochastic Resonance (SR) is a nonlinear system specific phenomenon, which was demonstrated to lead to system unexpected (counter-intuitive) performance improvements under certain noise conditions. Memristor, on the other ... -
A radix-16 SRT division unit with speculation of the quotient digits
(Institute of Electrical and Electronics Engineers (IEEE), 1999)
Text en actes de congrés
Accés obertThe speed of a divider based on a digit-recurrence algorithm depends mainly on the latency of the quotient digit generation function. In this paper we present an analytical approach that extends the theory developed for ... -
A reprogrammable graphene nanoribbon-based logic gate
(2023)
Article
Accés obertIn this article, taking into consideration the exceptional technological properties of a unique 2-D material, namely Graphene, we are envisioning its usage as the structure material of a non-back-gated re-programmable ... -
A structural encoding technique for the synthesis of asynchronous circuits
(Institute of Electrical and Electronics Engineers (IEEE), 2001)
Text en actes de congrés
Accés obertThis paper presents a method for the automatic synthesis of asynchronous circuits from Petri net specifications. The method is based on a structural encoding of the system in such a way that a circuit implementation is ... -
A systematic method to design efficient ternary high performance CNTFET-based logic cells
(Institute of Electrical and Electronics Engineers (IEEE), 2020-01-01)
Article
Accés obertThe huge quantity of nodes and interconnections in modern binary circuits leads to extremely high levels of energy consumption. The interconnection complexity and other issues of binary circuits encourage researchers to ...