Browsing by Subject "jitter"
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(Universitat Politècnica de Catalunya, 2012-09)
60 months embargo[ANGLÈS] Design of a low-jitter, low-phase noise clock driver in 40 nm CMOS technology. The work is in the field of analog integrated circuit (IC) design in nanometer CMOS technologies.
Threshold and timing errors of 1 bit / 2 level digital correlators in earth observation synthetic aperture radiometry (IEE-INST ELEC ENG, 1997-04-30)
Open AccessAnalytical expressions for the errors generated in 1 bit/2-level digital correlators (IB/2L) are derived: threshold errors in comparators and timing (skew and jitter) errors in samplers. These expressions are used to specify ...