Ara es mostren els items 1-20 de 21

  • A confidence assessment of WCET estimates for software time randomized caches 

    Benedicte Illescas, Pedro; Kosmidis, Leonidas; Quiñones, Eduardo; Abella Ferrer, Jaume; Cazorla Almeida, Francisco Javier (Institute of Electrical and Electronics Engineers (IEEE), 2016)
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    Obtaining Worst-Case Execution Time (WCET) estimates is a required step in real-time embedded systems during software verification. Measurement-Based Probabilistic Timing Analysis (MBPTA) aims at obtaining WCET estimates ...
  • Boosting Guaranteed Performance in Wormhole NoCs with Probabilistic Timing Analysis 

    Slijepcevic, Mladen; Hernandez, Carles; Abella, Jaume; Cazorla, Francisco J. (IEEE, 2017-09-28)
    Comunicació de congrés
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    Wormhole-based NoCs (wNoCs) are widely accepted in high-performance domains as the most appropriate solution to interconnect an increasing number of cores in the chip. However, wNoCs suitability in the context of critical ...
  • Circuit propagation delay estimation through multivariate regression-based modeling under spatio-temporal variability 

    Ganapathy, Shrikanth; Canal Corretger, Ramon; González Colás, Antonio María; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 2010)
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    With every process generation, the problem of variability in physical parameters and environmental conditions poses a great challenge to the design of fast and reliable circuits. Propagation delays which decide circuit ...
  • Conditional maximum likelihood timing recovery: estimators and bounds 

    Riba Sagarra, Jaume; Sala i Álvarez, Josep; Vázquez Grau, Gregorio (IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 2001-04-30)
    Article
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    This paper is concerned with the derivation of new estimators and performance bounds for the problem of timing estimation of (linearly) digitally modulated signals. The conditional maximum likelihood (CML) method is adopted, ...
  • Desarrollo de actividades de un módulo profesional de preimpresión digital 

    Fernández Esteve, Ligia Helena (Universitat Politécnica de Catalunya, 2017-06-21)
    Projecte Final de Màster Oficial
    Accés restringit per acord de confidencialitat
  • Design and implementation of a fair credit-based bandwidth sharing scheme for buses 

    Slijepcevic, Mladen; Hernandez, Carles; Abella, Jaume; Cazorla, Francisco J. (Institute of Electrical and Electronics Engineers (IEEE), 2017-05-15)
    Comunicació de congrés
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    Fair arbitration in the access to hardware shared resources is fundamental to obtain low worst-case execution time (WCET) estimates in the context of critical real-time systems, for which performance guarantees are essential. ...
  • Dynamic software randomisation: Lessons learnec from an aerospace case study 

    Cros, Fabrice; Kosmidis, Leonidas; Wartel, Franck; Morales, David; Abella, Jaume; Broster, Ian; Cazorla, Francisco J. (2017-05-15)
    Comunicació de congrés
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    Timing Validation and Verification (V&V) is an important step in real-time system design, in which a system's timing behaviour is assessed via Worst Case Execution Time (WCET) estimation and scheduling analysis. For WCET ...
  • EPC Enacted: Integration in an Industrial Toolbox and Use against a Railway Application 

    Mezzetti, Enrico; Fernandez, Mikel; Bardizbanyan, Alen; Agirre, Irune; Abella, Jaume; Vardanega, Tullio; Cazorla, Francisco J. (Institute of Electrical and Electronics Engineers (IEEE), 2017-06-08)
    Comunicació de congrés
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    Measurement-based timing analysis approaches are increasingly making their way into several industrial domains on account of their good cost-benefit ratio. The trustworthiness of those methods, however, suffers from the ...
  • EPC: Extended Path Coverage for Measurement-Based Probabilistic Timing Analysis 

    Ziccardi, Marco; Mezzetti, Enrico; Vardanega, Tullio; Abella, Jaume; Cazorla, Francisco J. (IEEE, 2016-01-18)
    Comunicació de congrés
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    Measurement-based probabilistic timing analysis (MBPTA) computes trustworthy upper bounds to the execution time of software programs. MBPTA has the connotation, typical of measurement-based techniques, that the bounds ...
  • Hardware schemes for early register release 

    Monreal Arnal, Teresa; Viñals Yufera, Víctor; González Colás, Antonio María; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2002)
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    Register files are becoming one of the critical components of current out-of-order processors in terms of delay and power consumption, since their potential to exploit instruction-level parallelism is quite related to the ...
  • Impact of the mechanical interface on BCG signals obtained from electronic weighing scales 

    Casanella Alonso, Ramón; Gomez Clapers, Joan; Hernández Urrea, Marc; Pallàs Areny, Ramon (2016)
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    Accés restringit per política de l'editorial
    This work analyzes the reproducibility of the BCG obtained from different weighing scales. First, the natural frequency of three commercial bathroom scales has been characterized by an impulse excitation test. Second, the ...
  • Measurement-based probabilistic timing analysis: Lessons from an integrated-modular avionics case study 

    Wartel, Franck; Kosmidis, Leonidas; Lo, Code; Triquet, Benoit; Quiñones, Eduardo; Abella Ferrer, Jaume; Gogonel, Adriana; Baldovin, Andrea; Mezzetti, Enrico; Cucu Grosjean, Liliana; Vardanega, Tulio; Cazorla Almeida, Francisco Javier (Institute of Electrical and Electronics Engineers (IEEE), 2013)
    Text en actes de congrés
    Accés restringit per política de l'editorial
    Probabilistic Timing Analysis (PTA) in general and its measurement-based variant called MBPTA in particular can mitigate some of the problems that impair current worst-case execution time (WCET) analysis techniques. MBPTA ...
  • Measuring the tolerance of self-adaptive clocks to supply voltage noise 

    Pérez Puigdemont, Jordi; Moll Echeto, Francisco de Borja; Cortadella Fortuny, Jordi (2011)
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    Simultaneous switching noise has become an important issue due to its signal integrity and timing implications. Therefore a lot of time and resources are spent during the PDN design to minimize the supply voltage variation. ...
  • Modelling bus contention during system early design stages 

    Trilla, David; Hernandez, Carles; Abella, Jaume; Cazorla, Francisco J. (IEEE, 2017-07-31)
    Comunicació de congrés
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    Reliably upperbounding contention in multicore shared resources is of prominent importance in the early design phases of critical real-time systems to properly allocate time budgets to applications. However, during early ...
  • Modelling the confidence of timing analysis for time randomised caches 

    Benedicte Illescas, Pedro; Kosmidis, Leonidas; Quiñones, Eduardo; Abella Ferrer, Jaume; Cazorla Almeida, Francisco Javier (Institute of Electrical and Electronics Engineers (IEEE), 2016)
    Text en actes de congrés
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    Timing is a key non-functional property in embedded real-Time systems (ERTS). ERTS increasingly require higher levels of performance that can only be sensibly provided by deploying high-performance hardware, which however ...
  • Non-data-aided frequency offset and symbol timing estimation for binary CPM: performance bounds 

    Riba Sagarra, Jaume; Vázquez Grau, Gregorio (Institute of Electrical and Electronics Engineers (IEEE), 2000)
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    The use of (spectrally efficient) CPM modulations may lead to a serious performance degradation of the classical non-data-aided (NDA) frequency and timing estimators due to the presence of self noise. The actual performance ...
  • On uses of extreme value theory fit for industrial-quality WCET analysis 

    Milutinovic, Suzana; Mezzetti, Enrico; Abella, Jaume; Vardanega, Tullio; Cazorla, Francisco J. (IEEE, 2017-07-31)
    Comunicació de congrés
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    Over the last few years, considerable interest has arisen in measurement-based probabilistic timing analysis. The term MBPTA has been used to indistinctly refer to a variety of different applications of Extreme Value Theory ...
  • Probabilistic timing analysis on time-randomized platforms for the space domain 

    Fernandez, Mikel; Morales, David; Kosmidis, Leonidas; Bardizbanyan, Alen; Broster, Ian; Hernandez, Carles; Quiñones, Eduardo; Abella, Jaume; Cazorla, Francisco; Machado, Paulo; Fossati, Luca (Institute of Electrical and Electronics Engineers (IEEE), 2017-05-15)
    Comunicació de congrés
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    Timing Verification is a fundamental step in real-time embedded systems, with measurement-based timing analysis (MBTA) being the most common approach used to that end. We present a Space case study on a real platform that ...
  • pTNoC: Probabilistically time-analyzable tree-based NoC for mixed-criticality systems 

    Slijepcevic, Mladen; Fernández, Mikel; Hernández, Carles; Abella, Jaume; Quiñones, Eduardo; Cazorla Almeida, Francisco Javier (Institute of Electrical and Electronics Engineers (IEEE), 2016)
    Text en actes de congrés
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    The use of networks-on-chip (NoC) in real-time safety-critical multicore systems challenges deriving tight worst-case execution time (WCET) estimates. This is due to the complexities in tightly upper-bounding the contention ...
  • Robust data detection in asynchronous DS-CDMA in the presence of timing uncertainty 

    Riba Sagarra, Jaume; Goldberg, J; Vázquez Grau, Gregorio (IEEE IEEE, 1996)
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    The decorrelating and minimum mean squared error data detectors for direct sequence code division multiple access (DS-CDMA) communications systems are known to exhibit low vulnerability to the near-far problem. Nevertheless, ...