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(Universitat Politècnica de Catalunya, 2012-06-26)
Master thesis (pre-Bologna period)
Open Access[ENGLISH] The purpose of this study was to perform the hardware description in VHDL language of an Edge Detection system based in Sobel operator and Multifiltering for a Virtex-5 FPGA. The procedure of the algorithm was ...
(Universitat Politècnica de CatalunyaConcordia University, 2013-07-18)
Bachelor thesis[ANGLÈS] This project is the continuation of a research work focused on improving the current popular techniques for contrast enhancement in images. There are stills produced under very poor acquisition conditions, such ...