Now showing items 1-2 of 2

  • Reusing cached schedules in an out-of-order processor with in-order issue logic 

    Palomar Pérez, Óscar (Universitat Politècnica de Catalunya, 2011-05-09)
    Doctoral thesis
    Open Access
  • Runtime-aware architectures 

    Casas Guix, Marc; Moreto Planas, Miquel; Álvarez Martí, Lluc; Castillo Villar, Emilio; Chasapis, Dimitrios; Hayes, Timothy; Jaulmes, Luc; Palomar Pérez, Óscar; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Ayguadé Parra, Eduard; Labarta Mancho, Jesús José; Valero Cortés, Mateo (Springer, 2015)
    Conference report
    Open Access
    In the last few years, the traditional ways to keep the increase of hardware performance to the rate predicted by the Moore’s Law have vanished. When uni-cores were the norm, hardware design was decoupled from the software ...