Now showing items 1-9 of 9

  • A polymorphic register file for matrix operations 

    Ciobanu, Catalin; Kuzmanov, Georgi; Gaydadjiev, Georgi; Ramírez Bellido, Alejandro (IEEE Computer Society Publications, 2010)
    Conference report
    Open Access
    Previous vector architectures divided the available register file space in a fixed number of registers of equal sizes and shapes. We propose a register file organization which allows dynamic creation of a variable number ...
  • Fast evaluation methodology for automatic custom hardware prototyping 

    González, Cecilia; Jiménez González, Daniel; Martorell Bofill, Xavier; Álvarez Martínez, Carlos; Gaydadjiev, Georgi (2009-06)
    Conference report
    Open Access
    Hardware customization for scientific applications has shown a big potential for reducing power consumption and increasing performance. In particular, the automatic generation of ISA extensions for General-Purpose Processors ...
  • Metodologí­a para la generación y evaluación automática de hardware específico 

    González, Cecilia; Jiménez González, Daniel; Martorell Bofill, Xavier; Álvarez Martínez, Carlos; Gaydadjiev, Georgi (2009-09)
    Conference report
    Open Access
    En el área de la bioinformática podemos encontrar aplicaciones que suponen un reto para el diseño de nuevas arquitecturas de procesadores en términos de rendimiento, ya que sus características difieren de las de las ...
  • OpenMP extensions for FPGA Accelerators 

    Cabrera, Daniel; Martorell Bofill, Xavier; Gaydadjiev, Georgi; Ayguadé Parra, Eduard; Jiménez González, Daniel (2009-07)
    Conference report
    Open Access
    Reconfigurable computing is one of the paths to explore towards low-power supercomputing. However, programming these reconfigurable devices is not an easy task and still requires significant research and development efforts ...
  • Preliminary analysis of the cell BE processor limitations for sequence alignment applications 

    Isaza, Sebastian; Sánchez Castaño, Friman; Gaydadjiev, Georgi; Ramírez Bellido, Alejandro; Valero Cortés, Mateo (Springer, 2008-07-21)
    Conference report
    Restricted access - publisher's policy
    The fast growth of bioinformatics field has attracted the attention of computer scientists in the last few years. At the same time the increasing database sizes require greater efforts to improve the computational performance. ...
  • Preliminary work on a mechanism for testing a customized architecture 

    González, Cecilia; Jiménez González, Daniel; Martorell Bofill, Xavier; Álvarez Martínez, Carlos; Gaydadjiev, Georgi (2009-07)
    Conference report
    Open Access
    Hardware customization for scientific applications has shown a big potential for reducing power consumption and increasing performance. In particular, the automatic generation of ISA extensions for General-Purpose Processors ...
  • Scalability analysis of progressive alignment in a multicore 

    Isaza, Sebastian; Sánchez Castaño, Friman; Gaydadjiev, Georgi; Ramírez Bellido, Alejandro; Valero Cortés, Mateo (IEEE Press. Institute of Electrical and Electronics Engineers, 2010)
    Conference report
    Open Access
    Sequence alignment is a fundamental instrument in Bioinformatics. In recent years, numerous proposals have been addressing the problem of accelerating this class of applications. This, due to the rapid growth of sequence ...
  • Scalability evaluation of a polymorphic register file: a CG case study 

    Ciobanu, Catalin; Martorell Bofill, Xavier; Kuzmanov, Georgi; Ramírez Bellido, Alejandro; Gaydadjiev, Georgi (Springer, 2011)
    Conference report
    Restricted access - publisher's policy
    We evaluate the scalability of a Polymorphic Register File using the Conjugate Gradient method as a case study. We focus on a heterogeneous multi-processor architecture, taking into consideration critical parameters such ...
  • The SARC architecture 

    Gaydadjiev, Georgi; Isaza, Sebastian; Ramírez Bellido, Alejandro; Cabarcas, Felipe; Juurlink, Ben; Álvarez Mesa, Mauricio; Sánchez Castaño, Friman; Azevedo, Arnaldo; Meenderinck, Cor; Ciobanu, Catalin (2010-10)
    Article
    Open Access
    The SARC architecture is composed of multiple processor types and a set of user-managed direct memory access (DMA) engines that let the runtime scheduler overlap data transfer and computation. The runtime system automatically ...