Now showing items 6-7 of 7

  • Scalability of Macroblock-level parallelism for H.264 decoding 

    Álvarez Mesa, Mauricio; Ramírez Bellido, Alejandro; Azevedo, Arnaldo; Meenderinck, Cor; Juurlink, Ben; Valero Cortés, Mateo (IEEE Computer Society Publications, 2009-12-11)
    Conference report
    Open Access
    This paper investigates the scalability of MacroBlock(MB) level parallelization of the H.264 decoder for High Definition (HD) applications. The study includes three parts. First, a formal model for predicting the maximum ...
  • The SARC architecture 

    Gaydadjiev, Georgi; Isaza, Sebastian; Ramírez Bellido, Alejandro; Cabarcas, Felipe; Juurlink, Ben; Álvarez Mesa, Mauricio; Sánchez Castaño, Friman; Azevedo, Arnaldo; Meenderinck, Cor; Ciobanu, Catalin (2010-10)
    Open Access
    The SARC architecture is composed of multiple processor types and a set of user-managed direct memory access (DMA) engines that let the runtime scheduler overlap data transfer and computation. The runtime system automatically ...