Now showing items 1-4 of 4

  • Error probability in synchronous digital circuits due to power supply noise 

    Martorell Cid, Ferran; Pons Solé, Marc; Rubio, Antonio; Moll Echeto, Francisco de Borja (2007-09)
    Conference report
    Open Access
    This paper presents a probabilistic approach to model the problem of power supply voltage fluctuations. Error probability calculations are shown for some 90-nm technology digital circuits. The analysis here considered ...
  • Power supply noise and logic error probability 

    Andrade Miceli, Dennis Michael; Martorell Cid, Ferran; Pons Solé, Marc; Moll Echeto, Francisco de Borja; Rubio, Antonio (2007-08)
    Conference report
    Open Access
    Voltage fluctuations caused by parasitic impedances in the power supply rails of modern ICs are a major concern in nowadays ICs. The voltage fluctuations are spread out to the diverse nodes of the internal sections causing ...
  • Via-configurable transistor array: a regular design technique to improve ICs yield 

    Pons Solé, Marc; Moll Echeto, Francisco de Borja; Rubio, Antonio; Abella Ferrer, Jaume; Vera Rivera, Francisco Javier; González Colás, Antonio María (2007-09)
    Conference report
    Open Access
    Process variations are a major bottleneck for digital CMOS integrated circuits manufacturability and yield. That is why regular techniques with different degrees of regularity are emerging as possible solutions. Our ...
  • Voltage fluctuations in IC power supply distribution 

    Andrade Miceli, Dennis Michael; Martorell Cid, Ferran; Moll Echeto, Francisco de Borja; Rubio, Antonio (2007-11)
    Conference report
    Open Access
    The supply voltage decrease and power consumption increase of modern ICs made the requirements for low voltage fluctuation caused by packaging and on-chip parasitic impedances more difficult to achieve. Most of the research ...