• Adaptive runtime-assisted block prefetching on chip-multiprocessors 

    García Flores, Víctor; Rico Carro, Alejandro; Villavieja Prados, Carlos; Carpenter, Paul M.; Navarro Mas, Nacho; Ramirez, Alex (2016-04-29)
    Article
    Accés restringit per política de l'editorial
    Memory stalls are a significant source of performance degradation in modern processors. Data prefetching is a widely adopted and well studied technique used to alleviate this problem. Prefetching can be performed by the ...
  • Cómo evaluar continua e individualmente en asignaturas basadas en proyectos 

    Velasco Esteban, Luis Domingo; Villavieja Prados, Carlos (2009-06-23T08:21:09Z)
    Text en actes de congrés
    Accés obert
    En este artículo se describe el diseño de la asignatura de Projecte de Xarxes de Computadors i Sistemes Operatius (PXCSO) [1] de la Facultat d'Informàtica de Barcelona (FIB) [2], de la Universitat Politècnica de Catalunya ...
  • On the simulation of large-scale architectures using multiple application abstraction levels 

    Rico Carro, Alejandro; Cabarcas, Felipe; Villavieja Prados, Carlos; Pavlovic, Milan; Vega, Augusto; Etsion, Yoav; Ramírez Bellido, Alejandro; Valero Cortés, Mateo (2012-01-23)
    Article
    Accés restringit per política de l'editorial
    Simulation is a key tool for computer architecture research. In particular, cycle-accurate simulators are extremely important for microarchitecture exploration and detailed design decisions, but they are slow and, so, not ...
  • On-Chip memories, the OS perspective 

    Villavieja Prados, Carlos; Gelado Fernandez, Isaac; Ramírez Bellido, Alejandro; Navarro, Nacho (2008-06-04)
    Text en actes de congrés
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    This paper is a work in progress study of the operating system services required to manage on-chip memories. We are evaluating different CMP on-chip memories configurations. Chip-MultiProcessors (CMP) architectures ...