Exploració per autor "Quiñones, Eduardo"
Ara es mostren els items 5-24 de 61
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Achieving timing composability with measurement-based probabilistic timing analysis
(2013)
Text en actes de congrés
Accés restringit per política de l'editorialProbabilistic Timing Analysis (PTA) allows complex hardware acceleration features, which defeat classic timing analysis, to be used in hard real-time systems. PTA can do that because it drastically reduces intrinsic ... -
Adapting TDMA arbitration for measurement-based probabilistic timing analysis
(Elsevier, 2017-07)
Article
Accés obertCritical Real-Time Embedded Systems require functional and timing validation to prove that they will perform their functionalities correctly and in time. For timing validation, a bound to the Worst-Case Execution Time ... -
Adaptive optics control with reinforcement learning: first steps
(Barcelona Supercomputing Center, 2021-05)
Text en actes de congrés
Accés obertWhen planar wavefronts from distant stars traverse the atmosphere, they become distorted due to the atmosphere’s inhomogeneous temperature distribution. Adaptive Optics (AO) is the field in charge of correcting those ... -
An Analysis of Lazy and Eager Limited Preemption Approaches under DAG-Based Global Fixed Priority Scheduling
(Institute of Electrical and Electronics Engineers (IEEE), 2017-07-03)
Comunicació de congrés
Accés obertDAG-based scheduling models have been shown to effectively express the parallel execution of current many-core heterogeneous architectures. However, their applicability to real-time settings is limited by the difficulties ... -
An analyzable memory controller for hard real-time CMPs
(2010-02-05)
Article
Accés obertMulticore processors (CMPs) represent a good solution to provide the performance required by current and future hard real-time systems. However, it is difficult to compute a tight WCET estimation for CMPs due to interferences ... -
An ILP-based real-time scheduler for distributed and heterogeneous computing environments
(Barcelona Supercomputing Center, 2019-05-07)
Text en actes de congrés
Accés obert -
Applying measurement-based probabilistic timing analysis to buffer resources
(2013)
Text en actes de congrés
Accés obertThe use of complex hardware makes it difficult for current timing analysis techniques to compute trustworthy and tight worst-case execution time (WCET) bounds. Those techniques require detailed knowledge of the internal ... -
Big Data Analytics for Smart Cities: The H2020 CLASS Project
(ACM, 2018-06-04)
Comunicació de congrés
Accés obertApplying big-data technologies to field applications has resulted in several new needs. First, processing data across a compute continuum spanning from cloud to edge to devices, with varying capacity, architecture etc. ... -
Bus designs for time-probabilistic multicore processors
(European Interactive Digital Advertising Alliance (EDAA), 2014)
Text en actes de congrés
Accés restringit per política de l'editorialProbabilistic Timing Analysis (PTA) reduces the amount of information needed to provide tight WCET estimates in real-time systems with respect to classic timing analysis. PTA imposes new requirements on hardware design ... -
Computing Safe Contention Bounds for Multicore Resources with Round-Robin and FIFO Arbitration
(Institute of Electrical and Electronics Engineers (IEEE), 2016-10-11)
Article
Accés obertNumerous researchers have studied the contention that arises among tasks running in parallel on a multicore processor. Most of those studies seek to derive a tight and sound upper-bound for the worst-case delay with which ... -
Containing timing-related certification cost in automotive systems deploying complex hardware
(Association for Computing Machinery (ACM), 2014)
Text en actes de congrés
Accés restringit per política de l'editorialMeasurement-Based Probabilistic Timing Analysis (MBPTA) techniques simplify deriving tight and trustworthy WCET estimates for industrial-size programs running on complex processors. MBPTA poses some requirements on the ... -
Contention in multicore hardware shared resources: Understanding of the state of the art
(Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 2014)
Text en actes de congrés
Accés obertThe real-time systems community has over the years devoted considerable attention to the impact on execution timing that arises from contention on access to hardware shared resources. The relevance of this problem has been ... -
Data bus slicing for contention-free multicore real-time memory systems
(Institute of Electrical and Electronics Engineers (IEEE), 2016)
Text en actes de congrés
Accés obertMemory access contention is one of the main contributors to tasks' execution time variability in real-Time multicores. Existing techniques to control memory contention based on time-sharing memory access do not scale well ... -
Deconstructing bus access control policies for real-time multicores
(Institute of Electrical and Electronics Engineers (IEEE), 2013)
Text en actes de congrés
Accés restringit per política de l'editorialMulticores may satisfy the growing performance requirements of critical Real-Time systems which has made industry to consider them for future real-time systems. In a multicore, the bus contention-control policy plays a key ... -
DTM: degraded test mode for fault-aware probabilistic timing analysis
(Institute of Electrical and Electronics Engineers (IEEE), 2013)
Text en actes de congrés
Accés restringit per política de l'editorialExisting timing analysis techniques to derive Worst-Case Execution Time (WCET) estimates assume that hardware in the target platform (e.g., the CPU) is fault-free. Given the performance requirements increase in current ... -
Early register release for out-of-order processors with register windows
(Institute of Electrical and Electronics Engineers (IEEE), 2007)
Text en actes de congrés
Accés obertRegister windows is an architectural technique that reduces memory operations required to save and restore registers across procedure calls. Its effectiveness depends on the size of the register file. Such register ... -
Enabling Ada and OpenMP runtimes interoperability through template-based execution
(Elsevier, 2020-05)
Article
Accés obertThe growing trend to support parallel computation to enable the performance gains of the recent hardware architectures is increasingly present in more conservative domains, such as safety-critical systems. Applications ... -
Experiences on the characterization of parallel applications in embedded systems with Extrae/Paraver
(Association for Computing Machinery (ACM), 2020-08)
Comunicació de congrés
Accés obertCutting-edge functionalities in embedded systems require the use of parallel architectures to meet their performance requirements. This imposes the introduction of a new layer in the software stacks of embedded systems: ... -
Fitting processor architectures for measurement-based probabilistic timing analysis
(2016-11-01)
Article
Accés obertThe pressing market demand for competitive performance/cost ratios compels Critical Real-Time Embedded Systems industry to employ feature-rich hardware. The ensuing rise in hardware complexity however makes worst-case ... -
Framework for the Analysis and Configuration of Real-Time OpenMP Applications
(Institute of Electrical and Electronics Engineers (IEEE), 2023)
Comunicació de congrés
Accés obertHigh-performance cyber-physical applications impose several requirements with respect to performance, functional correctness and non-functional aspects. Nowadays, the design of these systems usually follows a model-driven ...
