Exploració per altres contribucions "Palomar Pérez, Óscar"
Ara es mostren els items 1-7 de 7
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A novel access pattern-based multi-core memory architecture
(Universitat Politècnica de Catalunya, 2014-12-18)
Tesi
Accés obertIncreasingly High-Performance Computing (HPC) applications run on heterogeneous multi-core platforms. The basic reason of the growing popularity of these architectures is their low power consumption, and high throughput ... -
Design and implementation of a Multimedia Extension for a RISC Processor
(Universitat Politècnica de Catalunya, 2015-07-02)
Projecte Final de Màster Oficial
Accés obertDesign and implementation of a Multimedia Extension for a RISC Processor in a FPGA -
Design of energy-efficient vector units for in-order cores
(Universitat Politècnica de Catalunya, 2017-01-31)
Tesi
Accés obertIn the last 15 years, power dissipation and energy consumption have become crucial design concerns for almost all computer systems. Technology feature size scaling leads to higher power density and therefore to complex and ... -
Infrastructure and functional correctness in the verification of a RISC-V vector accelerator
(Universitat Politècnica de Catalunya, 2022-01-26)
Projecte Final de Màster Oficial
Accés restringit per decisió de l'autor
Realitzat a/amb: Barcelona Supercomputing CenterWhen we talk about hardware development, many efforts are made to tape out a bug-free design. The hardware fabrication process costs enormous amounts of money to the companies, so they can not afford to produce faulty ... -
Novel vector architectures for data management
(Universitat Politècnica de Catalunya, 2015-07-08)
Tesi
Accés obertAs the rate of annual data generation grows exponentially, there is a demand to manage, query and summarise vast amounts of information quickly. In the past, frequency scaling was relied upon to push application throughput. ... -
Specialization and reconfiguration of lightweight mobile processors for data-parallel applications
(Universitat Politècnica de Catalunya, 2016-01-26)
Tesi
Accés obertThe worldwide utilization of mobile devices makes the segment of low power mobile processors leading in the entire computer industry. Customers demand low-cost, high-performance and energy-efficient mobile devices, which ... -
Verification of a floating point reduction unit
(Universitat Politècnica de Catalunya, 2021-07-01)
Treball Final de Grau
Accés obertThis thesis goes around the effort made to verify a submodule of a vector processing unit or VPU. This submodule is the one in charge of performing vector reductions, and due to the nature of some of the reductions, an ...