Exploració per altres contribucions "Sapatnekar, Sachin"
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Algorithms and methodologies for interconnect reliability analysis of integrated circuits
(Universitat Politècnica de Catalunya, 2017-05-05)
Tesi
Accés obertThe phenomenal progress of computing devices has been largely made possible by the sustained efforts of semiconductor industry in innovating techniques for extremely large-scale integration. Indeed, gigantically integrated ... -
Library-free technology mapping for VLSI circuits with regular layouts
(Universitat Politècnica de Catalunya, 2014-07)
Projecte Final de Màster Oficial
Accés obertTechnology mapping is the task to transform a technology independent logic network into a mapped network using gates from a library, optimizing some objective function such total area, delay or power consumption. As stated, ...