• Analysis of non-uniform cache architecture policies for chip-multiprocessors using the Parsec Benchmark Suite 

    Lira Rueda, Javier; Molina Clemente, Carlos; González Colás, Antonio María (Association for Computing Machinery (ACM), 2009)
    Text en actes de congrés
    Accés restringit per política de l'editorial
    Non-Uniform Cache Architectures (NUCA) have been proposed as a solution to overcome wire delays that will dominate on-chip latencies in Chip Multiprocessor designs in the near future. This novel means of organization divides ...
  • Case for a field-programmable gate array multicore hybrid machine for an image-processing application 

    Rakvic, R.; Ives, Robert W.; Lira Rueda, Javier; Molina Clemente, Carlos (2011-01)
    Article
    Accés restringit per política de l'editorial
    General purpose computer designers have recently begun adding cores to their processors in order to increase performance. For example, Intel has adopted a homogeneous quad-core processor as a base for general purpose ...
  • Implementing a hybrid SRAM / eDRAM NUCA architecture 

    Lira Rueda, Javier; Molina Clemente, Carlos; Brooks, David; González Colás, Antonio María (2010-08-27)
    Report de recerca
    Accés obert
    In this paper, we propose a hybrid cache architecture that exploits the main features of both memory technologies, speed of SRAM and high density of eDRAM. We demonstrate, that due to the high locality found in emerging ...
  • Last Bank: dealing with address reuse in non-uniform cache architecture for CMPs 

    Lira Rueda, Javier; Molina Clemente, Carlos; González Colás, Antonio María (2009-01-16)
    Report de recerca
    Accés obert
    In response to the constant increase in wire delays, Non-Uniform Cache Architecture (NUCA) has been introduced as an effective memory model for dealing with growing memory latencies. This architecture divides a large memory ...
  • LRU-PEA: A smart replacement policy for non-uniform cache architectures on chip multiprocessors 

    Lira Rueda, Javier; Molina Clemente, Carlos; González Colás, Antonio María (2009-05-14)
    Report de recerca
    Accés obert
    The increasing speed-gap between processor and memory and the limited memory bandwidth make last-level cache performance crucial for CMP architectures. Non Uniform Cache Architectures (NUCA) has been introduced to deal ...
  • Managing dynamic non-uiform cache architectures 

    Lira Rueda, Javier (Universitat Politècnica de Catalunya, 2011-11-25)
    Tesi
    Accés obert
    Researchers from both academia and industry agree that future CMPs will accommodate large shared on-chip last-level caches. However, the exponential increase in multicore processor cache sizes accompanied by growing on-chip ...
  • Performance analysis of non-uniform cache architecture policies for chip-multiprocessors using the Parsec v2.0 Benchmark Suite 

    Lira Rueda, Javier; Molina Clemente, Carlos; González Colás, Antonio María (2009-09)
    Text en actes de congrés
    Accés restringit per política de l'editorial
    Non-Uniform Cache Architectures (NUCA)have been proposed as a solution to overcome wire delays that will dominate on-chip latencies in Chip Multiprocessor designs in the near future. This novel means of organization divides ...
  • The Auction: optimizing banks usage in non-uniform cache architectures 

    Lira Rueda, Javier; Molina Clemente, Carlos; González Colás, Antonio María (Association for Computing Machinery (ACM), 2010)
    Text en actes de congrés
    Accés restringit per política de l'editorial
    The growing influence of wire delay in cache design has meant that access latencies to last-level cache banks are no longer constant. Non-Uniform Cache Architectures (NUCAs)have been proposed to address this problem. ...
  • The migration prefetcher: anticipating data promotion in dynamic NUCA caches 

    Lira Rueda, Javier; Jones, Timothy M.; Molina, Carlos; González Colás, Antonio María (2012-01)
    Article
    Accés obert