Ara es mostren els items 1-20 de 42

  • 8T SRAM Cell with Open Defects under Voltage and Timing Variations 

    Rodríguez Montañés, Rosa; Arumi Delgado, Daniel; Figueras Pàmies, Joan; Castillo Muñoz, Raul (2011)
    Text en actes de congrés
    Accés obert
  • An Efficient behavioral description frontend tool for mixed-mode SPICE simulation 

    Gómez Pau, Álvaro; Balado Suárez, Luz María; Figueras Pàmies, Joan; Chatterjee, Abhijit (2014)
    Text en actes de congrés
    Accés obert
  • Analog circuit test based on a digital signature 

    Gómez Pau, Álvaro; Sanahuja Moliner, Ricard; Balado Suárez, Luz María; Figueras Pàmies, Joan (2010)
    Text en actes de congrés
    Accés obert
    Production verification of analog circuit specifica- tions is a challenging task requiring expensive test equipment and time consuming procedures. This paper presents a method for low cost on-chip parameter verification ...
  • Analog circuits testing using digitally coded indirect measurements 

    Gómez Pau, Álvaro; Balado Suárez, Luz María; Figueras Pàmies, Joan (Institute of Electrical and Electronics Engineers (IEEE), 2015)
    Text en actes de congrés
    Accés restringit per política de l'editorial
    Testing mixed-signal circuits is a challenging task requiring high amounts of human and technical resources. To overcome these drawbacks, indirect testing methods have been adopted as an efficient solution to perform ...
  • BIST Architecture to Detect Defects in TSVs During Pre-Bond Testing 

    Arumi Delgado, Daniel; Rodríguez Montañés, Rosa; Figueras Pàmies, Joan (Institute of Electrical and Electronics Engineers (IEEE), 2013)
    Text en actes de congrés
    Accés restringit per política de l'editorial
    Through Silicon Vias (TSVs) are critical elements in three dimensional integrated circuits (3-D ICs). The detection of defective TSVs in the earliest process step is of major concern. Hence, testing TSVs is usually done ...
  • Built-In Sensor for Signal Integrity Faults in Digital Interconnect Signals 

    Champac Vilela, Víctor Hugo; Avendaño, Victor; Figueras Pàmies, Joan (2010-02)
    Article
    Accés obert
    Testing of signal integrity (SI) in current high-speed ICs, requires automatic test equipment test resources at the multigigahertz range, normally not available. Furthermore, for most internal nets of state-of-the-art ...
  • Built-In test of MEMS capacitive accelerometers for field failures and aging degradation. 

    Gómez Pau, Álvaro; Sanahuja Moliner, Ricard; Balado Suárez, Luz María; Figueras Pàmies, Joan (2012)
    Text en actes de congrés
    Accés obert
  • Criteria for indirect measurements in M-S testing 

    Gómez Pau, Álvaro; Balado Suárez, Luz María; Figueras Pàmies, Joan (2014)
    Text en actes de congrés
    Accés restringit per decisió de l'autor
    Analog and mixed-signal circuit testing is a cballenging task demanding large amounts of resources. In order to battle against this drawback, alternate testing has been established as an eflicient way of testing analog ...
  • Defective Behaviour of an 8T SRAM Cell with Open Defects 

    Rodríguez Montañés, Rosa; Arumi Delgado, Daniel; Manich Bou, Salvador; Figueras Pàmies, Joan; Di Carlo, Stefano; Prinetto, Paolo; Scionti, Alberto (2010)
    Text en actes de congrés
    Accés restringit per política de l'editorial
  • Diagnosis of full open defects in interconnect lines with fan-out 

    Arumi Delgado, Daniel; Rodríguez Montañés, Rosa; Figueras Pàmies, Joan; Eichenberger, Stefan; Hora, C.; Kruseman, Bram (IEEE Press. Institute of Electrical and Electronics Engineers, 2010-05-24)
    Text en actes de congrés
    Accés obert
    The development of accurate diagnosis methodologies is important to solve process problems and achieve fast yield improvement. As open defects are common in CMOS technologies, accurate diagnosis of open defects becomes ...
  • Diagnosis of full open defects in interconnecting lines 

    Rodríguez Montañés, Rosa; Arumi Delgado, Daniel; Figueras Pàmies, Joan; Eichenberger, Stefan; Hora, Camelia; Kruseman, Bram; Lousberg, M.; Majhi, A.K. (IEEE, 2007-05-31)
    Text en actes de congrés
    Accés obert
    A proposal for enhancing the diagnosis of full open defects in interconnecting lines of CMOS circuits is presented. The defective line is first classified as fully opened by means of a logic-based diagnosis tool (Faloc). ...
  • Digital signature generator for mixed-signal testing 

    Sanahuja Moliner, Ricard; Gómez Pau, Álvaro; Balado Suárez, Luz María; Figueras Pàmies, Joan (IEEE Computer Society Publications, 2009)
    Text en actes de congrés
    Accés obert
    Es presenta un nou generador de signatures digitals per controlar dues senyals anàlogues. Es presenta la tecnologia STM 65 nm per demostrar la viabilitat de la proposta.
  • Efficient production binning using octree tessellation in the alternate measurements space 

    Gómez Pau, Álvaro; Balado Suárez, Luz María; Figueras Pàmies, Joan (2015)
    Article
    Accés obert
    Binning after volume production is a widely accepted technique to classify fabricated ICs into different clusters depending on different degrees of specification compliance. This allows the manufacturer to sell non optimal ...
  • Evaluation of safety-oriented two-version architectures 

    Carrasco, Juan A.; Figueras Pàmies, Joan; Kuntzman, A (1991-03)
    Article
    Accés obert
    A Markov model taking into account physical and design faults for a two-version architecture oriented to safety-related applications is developed. Only a probabilistic knowledge of the initial state of the versions in ...
  • Gate leakage impact on full open defects in interconnect lines 

    Arumi Delgado, Daniel; Rodríguez Montañés, Rosa; Figueras Pàmies, Joan; Eichenberger, Stefan; Hora, Camelia; Kruseman, Bram (2011-06)
    Article
    Accés obert
    An Interconnect full open defect breaks the connection between the driver and the gate terminals of downstream transistors, generating a floating line. The behavior of floating lines is known to depend on several factors, ...
  • Identification of component deviations in analog circuits using digital signatures 

    Gómez Pau, Álvaro; Sanahuja Moliner, Ricard; Balado Suárez, Luz María; Figueras Pàmies, Joan (2011)
    Text en actes de congrés
    Accés restringit per política de l'editorial
    Analog circuits component diagnosis is a challenging task requiring expensive resources. This paper presents a low cost method to identify deviations in multiple component values using a precharacterisation of the impact ...
  • Impact of gate tunnelling leakage on CMOS circuits with full open defects 

    Rodríguez Montañés, Rosa; Arumi Delgado, Daniel; Figueras Pàmies, Joan; Eichenberger, S.; Hora, Camelia; Kruseman, B. (Institution of Electrical Engineers, 2007-10)
    Article
    Accés obert
    Interconnecting lines with full open defects become floating lines. In nanometric CMOS technologies, gate tunnelling leakage currents impact the behaviour of these lines, which cannot be considered electrically isolated ...
  • Improving indirect test efficiency using multi-directional tessellations in the measure space 

    Gómez Pau, Álvaro; Balado Suárez, Luz María; Figueras Pàmies, Joan (Institute of Electrical and Electronics Engineers (IEEE), 2016)
    Text en actes de congrés
    Accés restringit per política de l'editorial
    Indirect test strategies have risen as a promising solution to overcome the challenges encountered in analog and mixed-signal circuit testing and the ever increasing device verification costs. This work explores the ...
  • La Promoció 108 compleix 50 anys (1964-2014): història, entorn i records 

    del Cerro, Jordi; Cusí Cusí, Carles; Figueras Pàmies, Joan (Brau, 2014-09-01)
    Llibre
    Accés obert
  • Localization and Electrical Characterization of Interconnect Open Defects 

    Rodríguez Montañés, Rosa; Arumi Delgado, Daniel; Figueras Pàmies, Joan; Beverloo, Willem; Vries, Dirk K. de; Eichenberger, Stefan; Volf, Paul A. J. (2010-02)
    Article
    Accés obert
    A technique for extracting the electrical and topological parameters of open defects in process monitor lines is presented. The procedure is based on frequency-domain measurements performed at both end points of the ...