Browsing by Subject "Timing analysis"
Now showing items 1-3 of 3
A fast and retargetable framework for logic-IP-internal electromigration assessment comprehending advanced waveform effects (2016-06-01)
Open AccessA new methodology for system-on-chip-level logic-IP-internal electromigration verification is presented in this paper, which significantly improves accuracy by comprehending the impact of the parasitic RC loading and ...
Restricted access - publisher's policyThe rigorous application of static timing analysis requires a large and costly amount of detail knowledge on the hardware and software components of the system. Probabilistic Timing Analysis has potential for reducing the ...
Restricted access - publisher's policyWhile hardware caches are generally effective at improving application performance, they greatly complicate performance prediction. Slight changes in memory layout or data access patterns can lead to large and ...